VLSI Architecture for Block-matching Motion Estimation using ARPS Algorithm

What is it about?

This paper put forward a VLSI architecture for the Block-matching Motion Estimation using Adaptive Rood PatternSearch (ARPS) Algorithm. A comprehensive study of different block-matching motion estimation algorithms used for video encoding has been given. Further, ARPS algorithm has been found to be the best in terms of the computational complexity and ease of hardware realization. Hence a VLSI architecturedeemed suitable for both FPGA and ASIC implemenattions has been proposed and its performance compared with the state of the art architectures used for motion estimation.

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Why is it important?

best in terms of the chip area in ASIC and the maximum frequency of operartion. Further, it provides the best performance for different video resolutions.