All Stories

  1. Quantum Walks for Collision-Based Information Set Decoding
  2. Characterization of the Stability of DRAM Read Disturbances
  3. A high efficiency AVX2-optimized engineering of the post-quantum digital signature CROSS
  4. Quantum Oracle Synthesis from HDL Designs via Multi Level Intermediate Representation
  5. On the Hardness of Decoding Quasi-Cyclic Codes and the Security of Code-Based Public-Key Cryptosystems
  6. The CAPSARII Approach to Cyber-Secure Wearable, Ultra-Low-Power Networked Sensors for Soldier Health Monitoring
  7. Improving Quantum Compilation via Circuit Partitioning and Floorplanning
  8. Enhancing Quantum Circuit Compilation with Modular Floorplanning
  9. Threshold Selection for Iterative Decoding of $(v,\ w)$-Regular Binary Codes
  10. A Comparison of Deep Learning Approaches for Power-Based Side-Channel Attacks
  11. An Efficient and Unified RTL Accelerator Design for HQC-128, HQC-192, and HQC-256
  12. Post Quantum Cryptography Research Lines in the Italian Center for Security and Rights in Cyberspace
  13. Embedded Computer Systems: Architectures, Modeling, and Simulation
  14. A Grover-Meets-Simon Approach to Match Vector Boolean Functions
  15. An Unprofiled Single Trace Side-Channel Attack for Asymmetric Cryptosystems
  16. Review of Policy-as-Code Approaches to Manage Security and Privacy Conditions in Edge and Cloud Computing Ecosystems
  17. Availability, Reliability and Security
  18. Secure Audit Logs
  19. Secure Index
  20. Shuffle Index
  21. Top-k Query Processing on Encrypted Data
  22. Differentially Private ORAM
  23. Oblivious Parallel RAM (OPRAM)
  24. Oblivious RAM (ORAM)
  25. Privacy-Preserving Joins over Encrypted Data
  26. Private Boolean Queries on Encrypted Data
  27. Scrambling Compiler: Automated and Unified Countermeasure for Profiled and Non-profiled Side Channel Attacks
  28. Solving the Subset Sum Problem via Quantum Walk Search
  29. A Quantum Method to Match Vector Boolean Functions using Simon's Solver
  30. Optimizing Quantum Circuit Synthesis with Dominator Analysis
  31. A Quantum Circuit to Execute a Key-Recovery Attack Against the DES and 3DES Block Ciphers
  32. Investigating the Health State of X.509 Digital Certificates
  33. Bit-Flipping Decoder Failure Rate Estimation for (v,w)-Regular Codes
  34. Design of a Quantum Walk Circuit to Solve the Subset-Sum Problem
  35. A High Efficiency Hardware Design for the Post-Quantum KEM HQC
  36. Performance and Efficiency Exploration of Hardware Polynomial Multipliers for Post-Quantum Lattice-Based Cryptosystems
  37. Differentially Private ORAM
  38. Privacy-Preserving Joins over Encrypted Data
  39. Top-k Query Processing on Encrypted Data
  40. A Versatile and Unified HQC Hardware Accelerator
  41. Quantum Circuit Design for the Lee-Brickell Based Information Set Decoding
  42. Fault Attacks Friendliness of Post-quantum Cryptosystems
  43. A Non Profiled and Profiled Side Channel Attack Countermeasure through Computation Interleaving
  44. Program Committee DSD 2023
  45. Oblivious RAM (ORAM)
  46. Improving the Efficiency of Quantum Circuits for Information Set Decoding
  47. A flexible NTRU cryptographic accelerator for Application Specific Integrated Circuits
  48. An Efficient Unified Architecture for Polynomial Multiplications in Lattice-Based Cryptoschemes
  49. Oblivious Parallel RAM (OPRAM)
  50. Oblivious RAM (ORAM)
  51. Private Boolean Queries on Encrypted Data
  52. Secure Audit Logs
  53. Secure Index
  54. Quantum Computing Research Lines in the Italian Center for Supercomputing
  55. Locating Side Channel Leakage in Time through Matched Filters
  56. Profiled side channel attacks against the RSA cryptosystem using neural networks
  57. Shuffle Index
  58. Performance Bounds for QC-MDPC Codes Decoders
  59. A Complete Quantum Circuit to Solve the Information Set Decoding Problem
  60. List of External Reviewers CSF 2021 (all submission cycles)
  61. Privacy-aware character pattern matching over outsourced encrypted data
  62. Integrating Side Channel Security in the FPGA Hardware Design Flow
  63. Metis: An Integrated Morphing Engine CPU to Protect Against Side Channel Attacks
  64. A Quantum Circuit to Speed-Up the Cryptanalysis of Code-Based Cryptosystems
  65. Analysis of In-Place Randomized Bit-Flipping Decoders for the Design of LDPC and MDPC Code-Based Cryptosystems
  66. Exploring Cortex-M Microarchitectural Side Channel Information Leakage
  67. Profiled Attacks Against the Elliptic Curve Scalar Point Multiplication Using Neural Networks
  68. Efficient Oblivious Substring Search via Architectural Support
  69. 2020 Index IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Vol. 39
  70. A comprehensive analysis of constant-time polynomial inversion for post-quantum cryptosystems
  71. Constant weight strings in constant time
  72. A Failure Rate Model of Bit-flipping Decoders for QC-LDPC and QC-MDPC Code-based Cryptosystems
  73. Working Age: Providing Occupational Safety through Pervasive Sensing and Data Driven Behavior Modeling
  74. Decision Support Systems to Promote Health and Well-Being of People During Their Working Age: The Case of the WorkingAge EU Project
  75. Plaintext recovery attacks against linearly decryptable fully homomorphic encryption schemes
  76. Evaluating the Trade-offs in the Hardware Design of the LEDAcrypt Encryption Functions
  77. A Finite Regime Analysis of Information Set Decoding Algorithms
  78. A secure and authenticated host-to-memory communication interface
  79. Compiler-based Techniques to Secure Cryptographic Embedded Software against Side Channel Attacks
  80. Accelerating Automotive Analytics: The M2DC Appliance Approach
  81. LEDAcrypt: QC-LDPC Code-Based Cryptosystems with Bounded Decryption Failure Rate
  82. Scramble Suit: A Profile Differentiation Countermeasure to Prevent Template Attacks
  83. Privacy preserving substring search protocol with polylogarithmic communication cost
  84. Systematic parsing of X.509: Eradicating security issues with a parse tree
  85. Reactive side-channel countermeasures: Applicability and quantitative security evaluation
  86. A Comprehensive Side-Channel Information Leakage Analysis of an In-Order RISC CPU Microarchitecture
  87. M2DC—A Novel Heterogeneous Hyperscale Microserver Platform
  88. Software-only Reverse Engineering of Physical DRAM Mappings for Rowhammer Attacks
  89. OpenCL HLS Based Design of FPGA Accelerators for Cryptographic Primitives
  90. Side-channel security of superscalar CPUs : Evaluating the Impact of Micro-architectural Features
  91. Three-Server Swapping for Access Confidentiality
  92. Enforcing authorizations while protecting access confidentiality1
  93. LEDAkem: A Post-quantum Key Encapsulation Mechanism Based on QC-LDPC Codes
  94. Side-channel security of superscalar CPUs
  95. Comparison-Based Attacks Against Noise-Free Fully Homomorphic Encryption Schemes
  96. Access Privacy in the Cloud
  97. The M2DC Approach towards Resource-efficient Computing
  98. A Novel Regular Format for X.509 Digital Certificates
  99. M2DC – Modular Microserver DataCentre with heterogeneous hardware
  100. A Security Audit of the OpenPGP Format
  101. A Dynamic Tree-Based Data Structure for Access Privacy in the Cloud
  102. Encasing block ciphers to foil key recovery attempts via side channel
  103. A privacy-preserving encrypted OSN with stateless server interaction: The Snake design
  104. V2I Cooperation for Traffic Management with SafeCop
  105. The M2DC Project: Modular Microserver DataCentre
  106. Safe cooperative CPS: A V2I traffic management scenario in the SafeCOP project
  107. Data centres for IoT applications: The M2DC approach (Invited paper)
  108. Automated instantiation of side-channel attacks countermeasures for software cipher implementations
  109. A Fault-Based Secret Key Retrieval Method for ECDSA
  110. Access Control for the Shuffle Index
  111. A Note on Fault Attacks Against Deterministic Signature Schemes (Short Paper)
  112. Shuffle Index
  113. Foreword:
  114. Cyber-security analysis and evaluation for smart home management solutions
  115. The MEET Approach: Securing Cryptographic Embedded Software Against Side Channel Attacks
  116. Information leakage chaff
  117. Trace-based schedulability analysis to enhance passive side-channel attack resilience of embedded software
  118. Challenging the Trustworthiness of PGP: Is the Web-of-Trust Tear-Proof?
  119. Trusted Computing for Embedded Systems
  120. Towards Transparently Tackling Functionality and Performance Issues across Different OpenCL Platforms
  121. Protecting Access Confidentiality with Data Distribution and Swapping
  122. Practical Cryptography
  123. Fault Sensitivity Analysis at Design Time
  124. Computer Security Anchors in Smart Grids: The Smart Metering Scenario and Challenges
  125. Design space extension for secure implementation of block ciphers
  126. Symmetric Key Encryption Acceleration on Heterogeneous Many-Core Architectures
  127. Security challenges in building automation and SCADA
  128. Securing software cryptographic primitives for embedded systems against side channel attacks
  129. OpenCL performance portability for general-purpose computation on graphics processor units: an exploration on cryptographic primitives
  130. Snake: An End-to-End Encrypted Online Social Network
  131. A multiple equivalent execution trace approach to secure cryptographic embedded software
  132. Security Integration in Medical Device Design: Extension of an Automated Bio-Medical Engineering Design Methodology
  133. [Copyright notice]
  134. On Task Assignment in Data Intensive Scalable Computing
  135. On the Security of Partially Masked Software Implementations
  136. Differential Fault Analysis for Block Ciphers
  137. A Multiple Equivalent Execution Trace Approach to Secure Cryptographic Embedded Software
  138. Preface
  139. Supporting concurrency and multiple indexes in private access to outsourced data1
  140. A fault induction technique based on voltage underfeeding with application to attacks against AES and RSA
  141. Drop-In Control Flow Hijacking Prevention through Dynamic Library Interception
  142. Security Analysis of Building Automation Networks
  143. Distributed Shuffling for Preserving Access Confidentiality
  144. Secure and efficient design of software block cipher implementations on microcontrollers
  145. Enhancing Passive Side-Channel Attack Resilience through Schedulability Analysis of Data-Dependency Graphs
  146. Compiler-based side channel vulnerability analysis and optimized countermeasures application
  147. Theory and Practice of Cryptography Solutions for Secure Information Systems
  148. Automated Security Analysis of Dynamic Web Applications through Symbolic Code Execution
  149. A code morphing methodology to automate power analysis countermeasures
  150. Injection Technologies for Fault Attacks on Microprocessors
  151. Smart metering in power grids: Application scenarios and security
  152. Security and Privacy in Smart Grid Infrastructures
  153. Efficient and Private Access to Outsourced Data
  154. Selective Exchange of Confidential Data in the Outsourcing Scenario
  155. Supporting Concurrency in Private Data Outsourcing
  156. Fault attack to the elliptic curve digital signature algorithm with multiple bit faults
  157. Information Leakage Discovery Techniques to Enhance Secure Chip Design
  158. Search over Encrypted Data
  159. Secure Audit Logs
  160. Secure Index
  161. Secure Logging
  162. Fault attack on AES with single-bit induced faults
  163. Low voltage fault attacks to AES
  164. Encryption-Based Policy Enforcement for Cloud Storage
  165. Record Setting Software Implementation of DES Using CUDA
  166. SMaC
  167. Countermeasures against fault attacks on software implemented AES
  168. Improving first order differential power attacks through digital signal processing
  169. Fast Disk Encryption through GPGPU Acceleration
  170. Low Voltage Fault Attacks on the RSA Cryptosystem
  171. A Transform-Parametric Approach to Boolean Matching
  172. Design of a parallel AES for graphics hardware using the CUDA framework
  173. A pairing SW implementation for Smart-Cards
  174. A FPGA Coprocessor for the Cryptographic Tate Pairing over Fp
  175. Preserving confidentiality of security policies in data outsourcing
  176. Programming Highly Parallel Reconfigurable Architectures for Symmetric and Asymmetric Cryptographic Applications
  177. Countermeasures Against Branch Target Buffer Attacks
  178. Countermeasures Against Branch Target Buffer Attacks
  179. Program Organization
  180. A Unified Approach to Canonical Form-based Boolean Matching
  181. Programming Highly Parallel Reconfigurable Architectures for Public-Key Cryptographic Applications
  182. A unified approach to canonical form-based Boolean matching
  183. Computational intelligence techniques to detect toxic gas presence
  184. Parallel Hardware Architectures for the Cryptographic Tate Pairing
  185. Software implementation of Tate pairing over GF(2/sup m/)
  186. Efficient implementations of mobile video computations on domain-specific reconfigurable arrays
  187. Diffraction by an anisotropic dielectric half-plane: a uniform asymptotic PO solution
  188. The Role of the Normal Phonon–Phonon Scattering in the Lattice Thermal Conductivity and Phonon Drag in Metals at Low Temperatures
  189. The lattice thermal conductivity of aluminium at low temperatures
  190. Magnetic susceptibility of the singlet ground-state system (LaPr)Sn3
  191. Design Time Engineering of Side Channel Resistant Cipher Implementations