All Stories

  1. Formulating microwave measurement and design in terms of X-parameters using signal flow graphs
  2. A 76-Gbit/s 265-GHz CMOS Receiver With WR-3.4 Waveguide Interface
  3. 300-GHz-Band OFDM Video Transmission with CMOS TX/RX Modules and 40dBi Cassegrain Antenna toward 6G
  4. Variable-Temperature Noise Characterization of N-MOSFETs Using an In-Situ Broadband Amplifier
  5. A 258-GHz CMOS Transmitter with Phase-Shifting Architecture for Phased-Array Systems
  6. A 32-Gb/s CMOS Receiver With Analog Carrier Recovery and Synchronous QPSK Demodulation
  7. Direct White Noise Characterization of Short-Channel MOSFETs
  8. Direct white noise characterization of short-channel MOSFETs
  9. Session 23 Overview: THz Circuits and Front-Ends
  10. White Noise Characterization of N-MOSFETs for Physics-Based Cryogenic Device Modeling
  11. Variable-Temperature Noise Characterization of N-MOSFETs Using an In-Situ Broadband Amplifier
  12. An 80-Gb/s 300-GHz-Band Single-Chip CMOS Transceiver
  13. A 6-mW-DC-Power 300-GHz CMOS Receiver for Near-Field Wireless Communications
  14. A −40-dBc Integrated-Phase-Noise 45-GHz Sub-Sampling PLL with 3.9-dBm Output and 2.1% DC-to-RF Efficiency
  15. Highly Configurable Cylindrical-Resonator-Based Bandpass Filter Built of Silica-Based Post-Wall Waveguide and Its Application to Compact E-Band Hybrid-Coupled Diplexer
  16. Wideband Power-Line Decoupling Technique for Millimeter-Wave CMOS Integrated Circuits
  17. 9.5 An 80Gb/s 300GHz-Band Single-Chip CMOS Transceiver
  18. Causal Characteristic Impedance Determination Using Calibration Comparison and Propagation Constant
  19. 300-GHz CMOS Transceiver for Terahertz Wireless Communication
  20. 32-Gbit/s CMOS Receivers in 300-GHz Band
  21. 300-GHz CMOS transmitter module with built-in waveguide transition on a multilayered glass epoxy PCB
  22. A 40 dB peak gain, wideband, low noise intermediate frequency (IF) amplifier
  23. An E-band hybrid-coupled diplexer built of silica-based post-wall waveguide
  24. A 416-mW 32-Gbit/s 300-GHz CMOS receiver
  25. 56-Gbit/s 16-QAM wireless link with 300-GHz-band CMOS transmitter
  26. A 32Gbit/s 16QAM CMOS receiver in 300GHz band
  27. An 80–106 GHz CMOS amplifier with 0.5V supply voltage
  28. Causal transmission line model incorporating frequency-dependent linear resistors
  29. DC and RF characterization of RF MOSFET embedding structure
  30. 17.9 A 105Gb/s 300GHz CMOS transmitter
  31. Integrated-Circuit Approaches to THz Communications: Challenges, Advances, and Future Prospects
  32. A 300 GHz CMOS Transmitter With 32-QAM 17.5 Gb/s/ch Capability Over Six Channels
  33. Characterization of 60-GHz silica-based post-wall waveguide and low-loss substrate dielectric
  34. A 300-GHz 64-QAM CMOS transmitter with 21-Gb/s maximum per-channel data rate
  35. Power spectrum analysis of a tripler-based 300-GHz CMOS up-conversion mixer
  36. 14.4-dB CMOS D-band low-noise amplifier with 22.6-mW power consumption utilizing bias-optimization technique
  37. System-level evaluation of 300GHz CMOS wireless transmitter using cubic mixer
  38. Terahertz CMOS transmitter supporting high-order digital modulation
  39. CMOS 300-GHz 64-QAM transmitter
  40. Quintic mixer: A subharmonic up-conversion mixer for THz transmitter supporting complex digital modulation
  41. Compact 141-GHz Differential Amplifier with 20-dB Peak Gain and 22-GHz 3-dB Bandwidth
  42. Scattered Reflections on Scattering Parameters — Demystifying Complex-Referenced S Parameters —
  43. 20.1 A 300GHz 40nm CMOS transmitter with 32-QAM 17.5Gb/s/ch capability over 6 channels
  44. 124-GHz CMOS quadrature voltage-controlled oscillator with fundamental injection locking
  45. Calibration of process parameters for electromagnetic field analysis of CMOS devices up to 330 GHz
  46. Compact 138-GHz amplifier with 18-dB peak gain and 27-GHz 3-dB bandwidth
  47. Comparative analysis of on-chip transmission line de-embedding techniques
  48. Modeling of wideband decoupling power line for millimeter-wave CMOS circuits
  49. Parasitic conscious 54 GHz divide-by-4 injection-locked frequency divider
  50. 300-GHz MOSFET model extracted by an accurate cold-bias de-embedding technique
  51. Compact 160-GHz amplifier with 15-dB peak gain and 41-GHz 3-dB bandwidth
  52. Compact and low-loss bandpass filter realized in silica-based post-wall waveguide for 60-GHz applications
  53. Wideband CMOS decoupling power line for millimeter-wave applications
  54. Characterization of wideband decoupling power line with extremely low characteristic impedance for millimeter-wave CMOS circuits
  55. Systematic calibration procedure of process parameters for electromagnetic field analysis of millimeter-wave CMOS devices
  56. Tehrahertz CMOS Design for Low-Power and High-Speed Wireless Communication
  57. Recent progress and prospects of terahertz CMOS
  58. 79GHz CMOS power amplifier using temperature compensation bias
  59. Design of CMOS resonating push-push frequency doubler
  60. Design of well-behaved low-loss millimetre-wave CMOS transmission lines
  61. Process parameter calibration for millimeter-wave CMOS back-end device design with electromagnetic field analysis
  62. E-Band 65nm CMOS Low-Noise Amplifier Design Using Gain-Boost Technique
  63. Evaluation of temperature dependence and lifetime of 79GHz power amplifier
  64. An Inductorless Cascaded Phase-Locked Loop with Pulse Injection Locking Technique in 90 nm CMOS
  65. Modeling of Short-Millimeter-Wave CMOS Transmission Line with Lossy Dielectrics with Specific Absorption Spectrum
  66. On the choice of cascade de-embedding methods for on-wafer S-parameter measurement
  67. Characteristic impedance determination technique for CMOS on-wafer transmission line with large substrate loss
  68. 1.2–17.6 GHz Ring-Oscillator-Based Phase-Locked Loop with Injection Locking in 65 nm Complementary Metal Oxide Semiconductor
  69. RF signal generator using time domain harmonic suppression technique in 90nm CMOS
  70. A Study of Digitally Controllable Radio Frequency Micro Electro Mechanical Systems Inductor
  71. 2.4–10 GHz Low-Noise Injection-Locked Ring Voltage Controlled Oscillator in 90 nm Complementary Metal Oxide Semiconductor
  72. Modeling of Reduced Surface Field Laterally Diffused Metal Oxide Semiconductor for Accurate Prediction of Junction Condition on Device Characteristics
  73. Universal Relationship between Substrate Current and History Effect in Silicon-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistors
  74. Interconnect Design Challenges in Nano CMOS Circuit
  75. RF CMOS Integrated Circuit: History, Current Status and Future Prospects
  76. High-Frequency Transmission Characteristics of the Interconnects Stacked into the 3D IC Configuration
  77. HiSIM-SOI: Complete surface-potential-based model valid for all SOI-structure types
  78. Inductorless 8.9 mW 25 Gb/s 1:4 DEMUX and 4 mW 13 Gb/s 4:1 MUX in 90 nm CMOS
  79. Radio Frequency Micro Electro Mechanical Systems Inductor Configurations for Achieving Large Inductance Variations and High Q-factors
  80. Low-phase-noise wide-frequency-range ring-VCO-based scalable PLL with subharmonic injection locking in 0.18 µm CMOS
  81. Design of On-Chip High Speed Interconnect on Complementary Metal Oxide Semiconductor 180 nm Technology
  82. RF Signal Generator Based on Time-to-Analog Converter in 0.18 µm Complementary Metal Oxide Semiconductor
  83. A Thru-Only De-Embedding Method Foron-Wafer Characterization of Multiport Networks
  84. On the validity of bisection-based thru-only de-embedding
  85. Wide-band, high linear low noise amplifier design in 0.18um CMOS technology
  86. A Universal Equivalent Circuit Model for Ceramic Capacitors
  87. Highly Energy-Efficient On-Chip Pulsed-Current-Mode Transmission Line Interconnect
  88. Design of CMOS inverter-based output buffers adapting the cherry-hooper broadbanding technique
  89. SMAFTI packaging technology for new interconnect hierarchy
  90. S-Parameter-Based Modal Decomposition of Multiconductor Transmission Lines and Its Application to De-Embedding
  91. A 20 Gb/s 1:4 DEMUX with Near-Rail-to-Rail Logic Swing in 90 nm CMOS process
  92. Physical design challenges to nano-CMOS circuits
  93. An 8.9mW 25Gb/s inductorless 1:4 DEMUX in 90nm CMOS
  94. Inter-Chip Wiring Technology for 3-D LSI
  95. Layout-Aware Compact Model of MOSFET Characteristics Variations Induced by STI Stress
  96. Single-parameter nonadiabatic quantized charge pumping
  97. Adaptable wire-length distribution with tunable occupation probability
  98. Nanosilicon for single-electron devices
  99. Cross-coupling in Coulomb blockade circuits: Bidirectional electron pump
  100. Characteristics of two Coulomb blockade transistors separated by an island to which an oscillating potential is applied: Theory and experiment
  101. Nanoscale Coulomb blockade memory and logic devices
  102. Analysis of multiphase clocked electron pumps consisting of single-electron transistors
  103. Charging and Retention Times in Silicon-Floating-Dot-Single-Electron Memory
  104. Scaling of the single-electron tunnelling current through ultrasmall tunnel junctions
  105. A Simple Model of a Single-Electron Floating Dot Memory for Circuit Simulation
  106. Circuit Simulators Aiming at Single-Electron Integration
  107. Correlated Electron-Hole Transport in Capacitively-Coupled One-Dimensional Tunnel Junction Arrays
  108. Estimation of Cotunneling in Single-Electron Logic and Its Suppression