All Stories

  1. Integrating SystemC-AMS Power Modeling with a RISC-V ISS for Virtual Prototyping of Battery-operated Embedded Devices
  2. Multi-Complexity-Loss DNAS for Energy-Efficient and Memory-Constrained Deep Neural Networks
  3. Human Activity Recognition on Microcontrollers with Quantized and Adaptive Deep Neural Networks
  4. Embedding Temporal Convolutional Networks for Energy-efficient PPG-based Heart Rate Monitoring
  5. Pruning In Time (PIT): A Lightweight Network Architecture Optimizer for Temporal Convolutional Networks
  6. TCN Mapping Optimization for Ultra-Low Power Time-Series Edge Inference
  7. ACME: An Energy-Efficient Approximate Bus Encoding for I2C
  8. Ultra-compact binary neural networks for human activity recognition on RISC-V processors
  9. Low-Overhead Power Trace Obfuscation for Smart Meter Privacy
  10. A Cross-level Verification Methodology for Digital IPs Augmented with Embedded Timing Monitors
  11. Dynamic Beam Width Tuning for Energy-Efficient Recurrent Neural Networks
  12. Battery-aware Design Exploration of Scheduling Policies for Multi-sensor Devices
  13. Optimal Topology-Aware PV Panel Floorplanning with Hybrid Orientation
  14. Approximate Energy-Efficient Encoding for Serial Interfaces
  15. Logic Synthesis of CMOS Circuits and Beyond
  16. A Li-Ion Battery Charge Protocol with Optimal Aging-Quality of Service Trade-off
  17. Serial T0
  18. Smart Systems Integration and Simulation
  19. Smart Electronic Systems: An Overview
  20. Energy-Efficient Digital Processing via Approximate Computing
  21. One-pass logic synthesis for graphene-based Pass-XNOR logic circuits
  22. Characterizing the Activity Factor in NBTI Aging Models for Embedded Cores
  23. Design and Characterization of Analog-to-Digital Converters using Graphene P-N Junctions
  24. Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization
  25. Thermal management of batteries using a hybrid supercapacitor architecture
  26. Cache aging reduction with improved performance using dynamically re-sizable cache
  27. Thermal management of batteries using a hybrid supercapacitor architecture
  28. Cache aging reduction with improved performance using dynamically re-sizable cache
  29. Placement-aware clustering for integrated clock and power gating
  30. Energy efficiency bounds of pulse-encoded buses
  31. Ambient Intelligence: A Computational Platform Perspective
  32. Memory Design Techniques for Low Energy Embedded Systems
  33. Introduction
  34. Perspectives
  35. Application-Driven Memory Partitioning
  36. Energy Optimization of the Memory Sub-System
  37. Application-Specific Memories
  38. Application-Specific Core-Based Systems
  39. Application-Specific Code Compression
  40. Energy-Efficient Shared Memory Architectures for Multi-Processor Systems-On-Chip