All Stories

  1. Shared Logic Unleashed: Multiple-Node Boolean Optimization for Next-Gen Synthesis
  2. Area-Oriented Optimization After Standard-Cell Mapping
  3. Back-end-aware Fault-tolerant Quantum Oracle Synthesis
  4. RareLS: Rarity-Reducing Logic Synthesis for Mitigating Hardware Trojan Threats
  5. Late Breaking Results: Majority-Inverter Graph Minimization by Design Space Exploration
  6. Towards Multiphase Clocking in Single-Flux Quantum Systems
  7. On the Synthesis of High-performance Homomorphic Boolean Circuits
  8. Compound Logic Gates for Pipeline Depth Minimization in Single Flux Quantum Integrated Systems
  9. Design and Optimization of Quantum Electronic Circuits
  10. Reducing the Multiplicative Complexity in Logic Networks for Cryptography and Security Applications
  11. Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains
  12. Fast generation of lexicographic satisfiable assignments
  13. Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization
  14. Nanowire systems: technology and design
  15. A distributed interleaving scheme for efficient access to WideIO DRAM memory