All Stories

  1. Effect of Magnetic Coupling Between Two CoFeB Layers on Thermal Stability in Perpendicular Magnetic Tunnel Junctions With MgO/CoFeB/Insertion Layer/CoFeB/MgO Free Layer
  2. Perpendicular Magnetic Tunnel Junctions With Four Anti-Ferromagnetically Coupled Co/Pt Pinning Layers
  3. Influence of Iridium Sputtering Conditions on the Magnetic Properties of Co/Pt-Based Iridium-Synthetic Antiferromagnetic Coupling Reference Layer
  4. First Demonstration of 25-nm Quad Interface p-MTJ Device With Low Resistance-Area Product MgO and Ten Years Retention for High Reliable STT-MRAM
  5. Dual-Port SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations Under Field-Assistance-Free Condition
  6. Effect of surface modification treatment on top-pinned MTJ with perpendicular easy axis
  7. Enhancement of magnetic coupling and magnetic anisotropy in MTJs with multiple CoFeB/MgO interfaces for high thermal stability
  8. Review of STT-MRAM circuit design strategies, and a 40-nm 1T-1MTJ 128Mb STT-MRAM design practice
  9. Recent Progresses in STT-MRAM and SOT-MRAM for Next Generation MRAM
  10. Scalability of Quad Interface p-MTJ for 1× nm STT-MRAM with 10 ns Low Power Write Operation, 10 Years Retention and Endurance > 1011
  11. Dual-Port Field-Free SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations under 55-nm CMOS Technology and 1.2-V Supply Voltage
  12. Effect of metallic Mg insertion in CoFeB/MgO interface perpendicular magnetic tunnel junction on tunnel magnetoresistance ratio observed by Synchrotron x-ray diffraction
  13. A free-extendible and ultralow-power nonvolatile multi-core associative coprocessor based on MRAM with inter-core pipeline scheme for large-scale full-adaptive nearest pattern searching
  14. Novel Quad-Interface MTJ Technology and its First Demonstration With High Thermal Stability Factor and Switching Efficiency for STT-MRAM Beyond 2X nm
  15. Influence of Hard Mask Materials on the Magnetic Properties of Perpendicular MTJs with Double CoFeB/MgO Interface
  16. 40-nm 1T-1MTJ 128Mb STT-MRAM with Novel Averaged Reference Voltage Generator Based on Detailed Analysis of Scaled-Down Memory Cell Array Design
  17. Scalability of Quad Interface p-MTJ for 1X nm STT-MRAM With 10-ns Low Power Write Operation, 10 Years Retention and Endurance > 10¹¹
  18. Structural Analysis of CoFeB/MgO-based Perpendicular MTJs with Junction Size of 20 nm by STEM Tomography
  19. Effect of capping layer material on thermal tolerance of magnetic tunnel junctions with MgO/CoFeB-based free layer/MgO/capping layers
  20. A 47.14-$\mu\text{W}$ 200-MHz MOS/MTJ-Hybrid Nonvolatile Microcontroller Unit Embedding STT-MRAM and FPGA for IoT Applications
  21. Effect of surface modification treatment of buffer layer on thermal tolerance of synthetic ferrimagnetic reference layer in perpendicular-anisotropy magnetic tunnel junctions
  22. Increasing the thermal tolerance of reference layer for STT-MRAM manufacturing
  23. Insertion Layer Thickness Dependence of Magnetic and Electrical Properties for Double-CoFeB/MgO-Interface Magnetic Tunnel Junctions
  24. Novel Quad interface MTJ technology and its first demonstration with high thermal stability and switching efficiency for STT-MRAM beyond 2Xnm
  25. Change in chemical bonding state by thermal treatment in MgO-based magnetic tunnel junction observed by angle-resolved hard X-ray photoelectron spectroscopy
  26. Critical Role of W Insertion Layer Sputtering Condition for Reference Layer on Magnetic and Transport Properties of Perpendicular-Anisotropy Magnetic Tunnel Junction
  27. A Recent Progress of Spintronics Devices for Integrated Circuit Applications
  28. STEM tomography study on structural features induced by MTJ processing
  29. 1T-1MTJ Type Embedded STT-MRAM with Advanced Low-Damage and Short-Failure-Free RIE Technology down to 32 nmφ MTJ Patterning
  30. Novel Method of Evaluating Accurate Thermal Stability for MTJs Using Thermal Disturbance and its Demonstration for Single-/Double-Interface p-MTJ
  31. High thermal tolerance synthetic ferrimagnetic reference layer with modified buffer layer by ion irradiation for perpendicular anisotropy magnetic tunnel junctions
  32. Impact of Tungsten Sputtering Condition on Magnetic and Transport Properties of Double-MgO Magnetic Tunneling Junction With CoFeB/W/CoFeB Free Layer
  33. A spin transfer torque magnetoresistance random access memory-based high-density and ultralow-power associative memory for fully data-adaptive nearest neighbor search with current-mode similarity evaluation and time-domain minimum searching
  34. Origin of variation of shift field via annealing at 400°C in a perpendicular-anisotropy magnetic tunnel junction with [Co/Pt]-multilayers based synthetic ferrimagnetic reference layer
  35. Impact of the Level of Anastomosis on Reflux Esophagitis Following Esophagectomy with Gastric Tube Reconstruction
  36. Improvement of Thermal Tolerance of CoFeB–MgO Perpendicular-Anisotropy Magnetic Tunnel Junctions by Controlling Boron Composition
  37. Demonstration of Yield Improvement for On-Via MTJ Using a 2-Mbit 1T-1MTJ STT-MRAM Test Chip
  38. A 600-µW ultra-low-power associative processor for image pattern recognition employing magnetic tunnel junction-based nonvolatile memories with autonomic intelligent power-gating scheme
  39. Study on initial current leakage spots in CoFeB-capped MgO tunnel barrier by conductive atomic force microscopy
  40. Erratum: “Evidence of a reduction reaction of oxidized iron/cobalt by boron atoms diffused toward naturally oxidized surface of CoFeB layer during annealing” [Appl. Phys. Lett. 106, 142407 (2015)]
  41. 1T1MTJ STT-MRAM Cell Array Design with an Adaptive Reference Voltage Generator for Improving Device Variation Tolerance
  42. Evidence of a reduction reaction of oxidized iron/cobalt by boron atoms diffused toward naturally oxidized surface of CoFeB layer during annealing
  43. Power-gated 32 bit microprocessor with a power controller circuit activated by deep-sleep-mode instruction achieving ultra-low power operation
  44. Properties of perpendicular-anisotropy magnetic tunnel junctions fabricated over the bottom electrode contact
  45. Nonvolatile Logic-in-Memory LSI Using Cycle-Based Power Gating and its Application to Motion-Vector Prediction
  46. Material Stack Design With High Tolerance to Process-Induced Damage in Domain Wall Motion Device
  47. Process-induced damage and its recovery for a CoFeB–MgO magnetic tunnel junction with perpendicular magnetic easy axis
  48. A delay circuit with 4-terminal magnetic-random-access-memory device for power-efficient time- domain signal processing
  49. Three-terminal magnetic tunneling junction device with perpendicular anisotropy CoFeB sensing layer
  50. Design and fabrication of a perpendicular magnetic tunnel junction based nonvolatile programmable switch achieving 40% less area using shared-control transistor structure
  51. 10.5 A 90nm 20MHz fully nonvolatile microcontroller for standby-power-critical applications
  52. Plasma process induced physical damages on multilayered magnetic films for magnetic domain wall motion
  53. Co/Pt multilayer based reference layers in magnetic tunnel junctions for nonvolatile spintronics VLSIs
  54. Wide operational margin capability of 1 kbit spin-transfer-torque memory array chip with 1-PMOS and 1-bottom-pin-magnetic-tunnel-junction type cell
  55. Electrical endurance of Co/Ni wire for magnetic domain wall motion device
  56. A 1 Mb Nonvolatile Embedded Memory Using 4T2MTJ Cell With 32 b Fine-Grained Power Gating Scheme
  57. Nonvolatile logic-in-memory array processor in 90nm MTJ/MOS achieving 75% leakage reduction using cycle-based power gating
  58. Fabrication of a magnetic tunnel junction-based 240-tile nonvolatile field-programmable gate array chip skipping wasted write operations for greedy power-reduced logic applications
  59. Damage Recovery by Reductive Chemistry after Methanol-Based Plasma Etch to Fabricate Magnetic Tunnel Junctions
  60. Damage Recovery by Reductive Chemistry after Methanol-Based Plasma Etch to Fabricate Magnetic Tunnel Junctions
  61. High-speed simulator including accurate MTJ models for spintronics integrated circuit design
  62. Magnetic tunneling junction with Fe/NiFeB free layer for magnetic logic circuits
  63. Domain-wall-motion cell with perpendicular anisotropy wire and in-plane magnetic tunneling junctions
  64. Analysis of MTJ Edge Deformation Influence on Switching Current Distribution for Next-Generation High-Speed MRAMs
  65. A 500-MHz MRAM macro for high-performance SoCs
  66. Improvement of Thermal Stability of Magnetoresistive Random Access Memory Device with SiN Protective Film Deposited by High-Density Plasma Chemical Vapor Deposition
  67. A 16-Mb Toggle MRAM With Burst Modes
  68. A 250-MHz 1-Mbit embedded MRAM macro using 2T1MTJ cell with bitline separation and half-pitch shift architecture
  69. Reduction of Writing Field Distribution in a Magnetic Random Access Memory With Toggle Switching
  70. MRAM Cell Technology for Over 500-MHz SoC
  71. Improvement of Thermal Stability of MRAM Device with SiN Protective Film Deposited by HDP CVD
  72. A 16Mb toggle MRAM with burst modes
  73. Large Exchange Coupling in Synthetic Antiferromagnet With Ultrathin Seed Layer
  74. Conceptual material design for magnetic tunneling junction cap layer for high magnetoresistance ratio
  75. Enhancement of writing margin for low switching toggle magnetic random access memories using multilayer synthetic antiferromagnetic structures
  76. Determination of the proton tunneling splitting of tropolone in the ground state by microwave spectroscopy