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  1. Spatio-Temporal Framework for Verifying Safety Rules in Autonomous Vehicles

    Article • September 2024, ACM (Association for Computing Machinery)

    Frederic Mallet

  2. A Scalable Approach to Detecting Safety Requirements Inconsistencies for Railway Systems

    Article • IEEE Transactions on Intelligent Transportation Systems, August 2024, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  3. A temporal logic with multiple loosely-dependent clock domains.

    Article • Formal Aspects of Computing, June 2024, ACM (Association for Computing Machinery)

    Min Zhang, Frederic Mallet

  4. Real-Time CCSL: Application to the Mechanical Lung Ventilator

    Article • January 2024, Springer Science + Business Media

    Frederic Mallet

  5. Automated Synthesis of Safe Timing Behaviors for Requirements Models Using CCSL

    Article • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, December 2023, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  6. Accelerating Reinforcement Learning-Based CCSL Specification Synthesis Using Curiosity-Driven Exploration

    Article • IEEE Transactions on Computers, May 2023, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  7. Time: It is only Logical!

    Article • January 2023, Springer Science + Business Media

    Frederic Mallet

  8. A dynamic logic for verification of synchronous models based on theorem proving

    Article • Frontiers of Computer Science, April 2022, Springer Science + Business Media

    Frederic Mallet

  9. Formally verifying consistency of sequence diagrams for safety critical systems

    Article • Science of Computer Programming, April 2022, Elsevier

    Frederic Mallet

  10. Enumeration and Deduction Driven Co-Synthesis of CCSL Specifications using Reinforcement Learning

    Article • December 2021, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  11. Model-driven approach for the design of Multi-Chain Smart Contracts

    Article • September 2021, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  12. Preface – FTSCS 2019

    Article • Science of Computer Programming, September 2021, Elsevier

    Frederic Mallet

  13. A clock-based dynamic logic for the verification of CCSL specifications in synchronous systems

    Article • Science of Computer Programming, March 2021, Elsevier

    Frederic Mallet

  14. A clock-based dynamic logic for schedulability analysis of CCSL specifications

    Article • Science of Computer Programming, February 2021, Elsevier

    Frederic Mallet

  15. EPSAAV: An Extensible Platform for Safety Analysis of Autonomous Vehicles

    Article • January 2021, Springer Science + Business Media

    Frederic Mallet

  16. Formally Verifying Sequence Diagrams for Safety Critical Systems

    Article • December 2020, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  17. Editorial - Theoretical Aspects of Software Engineering (2017)

    Article • Science of Computer Programming, October 2020, Elsevier

    Frederic Mallet

  18. Modeling and Verifying Uncertainty-Aware Timing Behaviors using Parametric Logical Time Constraint

    Article • March 2020, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  19. A Model-Based Combination Language for Scheduling Verification

    Article • January 2020, Springer Science + Business Media

    Frederic Mallet

  20. Correction to: Information and Communication Technologies in Education, Research, and Industrial Applications

    Article • January 2020, Springer Science + Business Media

    Frederic Mallet

  21. Time in SCCharts

    Article • December 2019, Springer Science + Business Media

    Frederic Mallet

  22. TRAP: trace runtime analysis of properties

    Article • Frontiers of Computer Science, December 2019, Springer Science + Business Media

    Frederic Mallet

  23. A Language-Based Multi-View Approach for Combining Functional and Security Models

    Article • December 2019, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  24. A Logical Approach for the Schedulability Analysis of CCSL

    Article • July 2019, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  25. Sample-Guided Automated Synthesis for CCSL Specifications

    Article • June 2019, ACM (Association for Computing Machinery)

    Frederic Mallet

  26. SMT-Based Bounded Schedulability Analysis of the Clock Constraint Specification Language

    Article • January 2019, Springer Science + Business Media

    Frederic Mallet

  27. Meta-models Combination for Reusing Verification Techniques

    Article • January 2019, Scitepress

    Frederic Mallet

  28. Embedding CCSL into Dynamic Logic: A Logical Approach for the Verification of CCSL Specifications

    Article • January 2019, Springer Science + Business Media

    Frederic Mallet

  29. Work-in-Progress: From Logical Time Scheduling to Real-Time Scheduling

    Article • December 2018, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  30. xSHS: An Executable Domain-Specific Modeling Language for Modeling Stochastic and Hybrid Behaviors of Cyber-Physical Systems

    Article • December 2018, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  31. A verification framework for spatio-temporal consistency language with CCSL as a specification language

    Article • Frontiers of Computer Science, November 2018, Springer Science + Business Media

    Frederic Mallet

  32. pCSSL: A stochastic extension to MARTE/CCSL for modeling uncertainty in Cyber Physical Systems

    Article • Science of Computer Programming, November 2018, Elsevier

    Frederic Mallet

  33. Time in SCCharts

    Article • September 2018, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  34. Periodic scheduling for MARTE/CCSL: Theory and practice

    Article • Science of Computer Programming, March 2018, Elsevier

    Frederic Mallet

  35. Quantitative Performance Evaluation of Uncertainty-Aware Hybrid AADL Designs Using Statistical Model Checking

    Article • IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, December 2017, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  36. Preface

    Article • September 2017, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  37. A framework to specify system requirements using natural interpretation of UML/MARTE diagrams

    Article • Software & Systems Modeling, March 2017, Springer Science + Business Media

    Frederic Mallet

  38. Explicit Control of Dataflow Graphs with MARTE/CCSL

    Article • January 2017, Scitepress

    Frederic Mallet

  39. MARTE/pCCSL: Modeling and Refining Stochastic Behaviors of CPSs with Probabilistic Logical Clocks

    Article • January 2017, Springer Science + Business Media

    Frederic Mallet

  40. Flexible runtime verification based on logical clock constraints

    Article • September 2016, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  41. Natural interpretation of UML/MARTE diagrams for system requirements specification

    Article • May 2016, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  42. Combining SysML and Marte/CCSL to Model Complex Electronic Systems

    Article • April 2016, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  43. Opening remarks

    Article • March 2016, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Roy Paily Palathinkal, Frederic Mallet, Professor Wei-Chiang Hong

  44. An Executable Semantics of Clock Constraint Specification Language and Its Applications

    Article • January 2016, Springer Science + Business Media

    Frederic Mallet

  45. An SMT-Based Approach to the Formal Analysis of MARTE/CCSL

    Article • January 2016, Springer Science + Business Media

    Frederic Mallet

  46. A Behavioral Coordination Operator Language (BCOoL)

    Article • September 2015, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  47. Correctness issues on MARTE/CCSL constraints

    Article • Science of Computer Programming, August 2015, Elsevier

    Frederic Mallet

  48. Coalgebraic Semantic Model for the Clock Constraint Specification Language

    Article • January 2015, Springer Science + Business Media

    Frederic Mallet

  49. MARTE/CCSL for Modeling Cyber-Physical Systems

    Article • January 2015, Springer Science + Business Media

    Frederic Mallet

  50. Execution of heterogeneous models for thermal analysis with a multi-view approach

    Article • October 2014, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  51. Timed Automata Semantics of Spatial-Temporal Consistency Language STeC

    Article • September 2014, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  52. Progressive and explicit refinement of scheduling for multidimensional data-flow applications using UML MARTE

    Article • Design Automation for Embedded Systems, August 2014, Springer Science + Business Media

    Frederic Mallet

  53. Fostering Analysis from Industrial Embedded Systems Modeling

    Article • January 2014, IGI Global

    Frederic Mallet

  54. UML MARTE Time Model and Its Clock Constraint Specification Language

    Article • January 2014, IGI Global

    Frederic Mallet

  55. Schedulability Analysis with CCSL Specifications

    Article • December 2013, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  56. Scenario-based verification in presence of variability using a synchronous approach

    Article • Frontiers of Computer Science, September 2013, Springer Science + Business Media

    Frederic Mallet

  57. Power consumption analysis using multi-view modeling

    Article • September 2013, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  58. Tool Support for the Analysis of TADL2 Timing Constraints Using TimeSquare

    Article • July 2013, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  59. Hybrid MARTE statecharts

    Article • Frontiers of Computer Science, January 2013, Springer Science + Business Media

    Frederic Mallet

  60. Analysis Support for TADL2 Timing Constraints on EAST-ADL Models

    Article • January 2013, Springer Science + Business Media

    Frederic Mallet

  61. Boundness Issues in CCSL Specifications

    Article • January 2013, Springer Science + Business Media

    Frederic Mallet

  62. Improving the Efficiency of Synchronized Product with Infinite Transition Systems

    Article • January 2013, Springer Science + Business Media

    Frederic Mallet

  63. Reifying Concurrency for Executable Metamodeling

    Article • January 2013, Springer Science + Business Media

    Frederic Mallet

  64. Two Semantic Models for Clock Relations in the Clock Constraint Specification Language

    Article • January 2013, Springer Science + Business Media

    Frederic Mallet

  65. Verifying MARTE/CCSL Mode Behaviors Using UPPAAL

    Article • January 2013, Springer Science + Business Media

    Frederic Mallet

  66. Automatic generation of observers from MARTE/CCSL

    Article • October 2012, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  67. Multi-view Power Modeling Based on UML, MARTE and SysML

    Article • September 2012, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  68. Formal Specification of Hybrid MARTE Statecharts

    Article • July 2012, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  69. Progressive and explicit refinement of scheduling for multidimensional data-flow applications using uml marte

    Article • Design Automation for Embedded Systems, June 2012, Springer Science + Business Media

    Frederic Mallet

  70. TimeSquare: Treat Your Models with Logical Time

    Article • January 2012, Springer Science + Business Media

    Frederic Mallet

  71. Modeling Timing Requirements in Problem Frames Using CCSL

    Article • December 2011, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  72. Logical Time @ Work: Capturing Data Dependencies and Platform Constraints

    Article • November 2011, Springer Science + Business Media

    Frederic Mallet

  73. Logical Time and Temporal Logics: Comparing UML MARTE/CCSL and PSL

    Article • September 2011, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  74. A Model-Based Approach for Reconciliation of Polychronous Execution Traces

    Article • August 2011, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  75. An Efficient Modeling and Execution Framework for Complex Systems Development

    Article • April 2011, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  76. Verification of MARTE/CCSL Time Requirements in Promela/SPIN

    Article • April 2011, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  77. Logical time

    Article • ACM SIGSOFT Software Engineering Notes, January 2011, ACM (Association for Computing Machinery)

    Frederic Mallet

  78. RT-simex

    Article • November 2010, ACM (Association for Computing Machinery)

    Frederic Mallet

  79. VHDL observers for clock constraint checking

    Article • July 2010, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  80. Un processus automatique pour concevoir les profils UML. Un profil UML pour la modélisation multiniveau

    Article • Techniques et sciences informatiques, May 2010, Lavoisier

    Frederic Mallet

  81. Polychronous Analysis of Timing Constraints in UML MARTE

    Article • May 2010, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  82. An Automated Process for Implementing Multilevel Domain Models

    Article • January 2010, Springer Science + Business Media

    Frederic Mallet

  83. Logical time at work: capturing data dependencies and platform constraints

    Article • January 2010, the Institution of Engineering and Technology (the IET)

    Frederic Mallet

  84. The Time Model of Logical Clocks Available in the OMG MARTE Profile

    Article • January 2010, Springer Science + Business Media

    Frederic Mallet

  85. IP-XACT Components with Abstract Time Characterization

    Article • January 2010, Springer Science + Business Media

    Frederic Mallet

  86. The clock constraint specification language for building timed causality models

    Article • Innovations in Systems and Software Engineering, December 2009, Springer Science + Business Media

    Frederic Mallet

  87. Modèle de contraintes temporelles pour systèmes polychrones

    Article • Journal Européen des Systèmes Automatisés, November 2009, International Information and Engineering Technology Association

    Frederic Mallet

  88. Specification and verification of time requirements with CCSL and Esterel

    Article • ACM SIGPLAN Notices, June 2009, ACM (Association for Computing Machinery)

    Frederic Mallet

  89. Specification and verification of time requirements with CCSL and Esterel

    Article • June 2009, ACM (Association for Computing Machinery)

    Frederic Mallet

  90. Marte CCSL to Execute East-ADL Timing Requirements

    Article • March 2009, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  91. On the Semantics of UML/MARTE Clock Constraints

    Article • March 2009, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  92. MARTE vs. AADL for Discrete-Event and Discrete-Time Domains

    Article • January 2009, Springer Science + Business Media

    Frederic Mallet

  93. Executing AADL Models with UML/MARTE

    Article • January 2009, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  94. Event-triggered vs. time-triggered communications with UML MARTE

    Article • September 2008, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  95. Clock constraint specification language: specifying clock constraints with UML/MARTE

    Article • Innovations in Systems and Software Engineering, August 2008, Springer Science + Business Media

    Frederic Mallet

  96. Dealing with AADL End-to-End Flow Latency with UML MARTE

    Article • March 2008, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  97. MARTE: A Profile for RT/E Systems Modeling, Analysis - and Simulation?

    Article • January 2008, Institute for Computer Sciences, Social Informatics and Telecommunications Engineering (ICST)

    Frederic Mallet

  98. Modeling AADL Data Communications with UML MARTE

    Article • January 2008, Springer Science + Business Media

    Frederic Mallet

  99. Multiform Time in UML for Real-time Embedded Applications

    Article • August 2007, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  100. A multiform time approach to real-time system modeling; Application to an automotive system

    Article • July 2007, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  101. Modeling Time(s)

    Article • January 2007, Springer Science + Business Media

    Frederic Mallet

  102. From UML to Petri Nets for non functional Property Verification

    Article • January 2006, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  103. Simulation of a computer architecture for quantum chromodynamics calculations

    Article • XRDS Crossroads The ACM Magazine for Students, March 2003, ACM (Association for Computing Machinery)

    Frederic Mallet

  104. Esterel and Java in an object-oriented modelling and simulation framework for heterogeneous software and hardware systems. The SEP approach

    Article • January 1999, Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  105. PREFACE

    Article • December 1982, De Gruyter

    Frederic Mallet

  106. Computer architecture simulation applets for use in teaching

    Article • Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  107. Concurrent control systems: from Grafcet to VHDL

    Article • Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet

  108. Hardware architecture modelling using an object-oriented method

    Article • Institute of Electrical & Electronics Engineers (IEEE)

    Frederic Mallet