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Most temporal logics express properties of a system relative to the expected global execution step of the whole system. We propose a logic that can express properties relative to a local execution step of a sub-system. Therefore properties of local subsystems become compositional and still hold when composing subsystems.
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This page is a summary of: Specification and Verification of Multi-clock Systems using a Temporal Logic with Clock Constraints, Formal Aspects of Computing, June 2024, ACM (Association for Computing Machinery),
DOI: 10.1145/3670794.
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