All Stories

  1. Demonstration of a novel Dual-Source Elevated-Channel Dopingless TFET with improved DC and Analog/RF performance

    Article • Microelectronics Journal, February 2024, Elsevier

    Dr. Chandan Kumar Pandey

  2. Physics based analysis of a High-Performance Dual line Tunneling TFET with Reduced Corner Effects

    Article • Physica Scripta, December 2023, Institute of Physics Publishing

    Dr. Chandan Kumar Pandey

  3. Impact of back gate-drain overlap on DC and analog/HF performance of a ferroelectric negative capacitance double gate TFET

    Article • Physica Scripta, November 2023, Institute of Physics Publishing

    Dr. Chandan Kumar Pandey

  4. Radiation Effects and Their Impact on SRAM Design

    Article • October 2023, Wiley

    Dr. Chandan Kumar Pandey

  5. Final Summary and Future of Advanced Ultra Low Power Metal Oxide Semiconductor Field Effect Transistors

    Article • October 2023, Wiley

    Dr. Chandan Kumar Pandey

  6. Mathematical Approach for a Future Semiconductor Roadmap

    Article • October 2023, Taylor & Francis

    Dr. Chandan Kumar Pandey

  7. Mathematical Approach for the Foundation of Negative Capacitance Technology

    Article • October 2023, Taylor & Francis

    Dr. Chandan Kumar Pandey

  8. GaSb/GaAs Type‐II heterojunction GAA‐TFET with core source for enhanced analog/RF performance and reliability

    Article • International Journal of Numerical Modelling Electronic Networks Devices and Fields, August 2023, Wiley

    Dr. Chandan Kumar Pandey

  9. Reduction of Corner Effect in ZG-ES-TFET for Improved Electrical Performance and its Reliability Analysis in the Presence of Traps

    Article • ECS Journal of Solid State Science and Technology, July 2023, The Electrochemical Society

    Dr. Chandan Kumar Pandey

  10. Interfacial trap charge and self-heating effect based reliability analysis of a Dual-Drain Vertical Tunnel FET

    Article • Microelectronics Reliability, July 2023, Elsevier

    Dr. Chandan Kumar Pandey

  11. DC Analysis and Analog/HF Performances of GAA-TFET with Dielectric Pocket

    Article • April 2023, Taylor & Francis

    Dr. Chandan Kumar Pandey

  12. TFET-based Memory Cell Design with Top-Down Approach

    Article • April 2023, Taylor & Francis

    Dr. Chandan Kumar Pandey

  13. Performance Investigation of a Vertical TFET with Inverted-T Channel for Improved DC and Analog/Radio-Frequency Parameters

    Article • ECS Journal of Solid State Science and Technology, April 2023, The Electrochemical Society

    Dr. Chandan Kumar Pandey

  14. A Dual-Drain Vertical Tunnel FET with Improved Device Performance: Proposal, Optimization, and Investigation

    Article • ECS Journal of Solid State Science and Technology, December 2022, The Electrochemical Society

    Dr. Chandan Kumar Pandey

  15. Design and Investigation of a Novel Gate-All-Around Vertical Tunnel FET with Improved DC and Analog/RF Parameters

    Article • ECS Journal of Solid State Science and Technology, November 2022, The Electrochemical Society

    Dr. Chandan Kumar Pandey

  16. Improved DC Performance of Nanotube Junctionless Field-Effect Transistors with Dielectric Pocket Integration

    Article • ECS Journal of Solid State Science and Technology, August 2022, The Electrochemical Society

    Dr. Chandan Kumar Pandey

  17. Performance analysis of silicon nanotube dielectric pocket Tunnel FET for reduced ambipolar conduction

    Article • Microelectronics Journal, August 2022, Elsevier

    Dr. Chandan Kumar Pandey

  18. A Review of Tunnel Field-Effect Transistors for Improved ON-State Behaviour

    Article • Silicon, July 2022, Springer Science + Business Media

    Dr. Chandan Kumar Pandey

  19. Memory Designing Using Low-Power FETs for Future Technology Nodes

    Article • July 2022, Taylor & Francis

    Dr. Chandan Kumar Pandey

  20. Tunnel Field-Effect Transistor

    Article • July 2022, Taylor & Francis

    Dr. Chandan Kumar Pandey

  21. Dielectric Engineered Cylindrical Junctionless FET for Low Power Applications

    Article • June 2022, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Chandan Kumar Pandey

  22. Dielectric Pocket Nanotube Junctionless Field-effect Transistor based Biosensor

    Article • June 2022, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Chandan Kumar Pandey

  23. TCAD Analysis of Dielectric Pocket Nanowire Junctionless Field-Effect Transistor based Biosensor

    Article • June 2022, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Chandan Kumar Pandey

  24. Theoretical investigation on un-doped and doped TiO2 for solar cell application

    Article • Physica Scripta, April 2022, Institute of Physics Publishing

    Dr. Chandan Kumar Pandey

  25. A Hetero-Dielectric Double-Gate Junctionless FET with Spacer for Improved Device Performances

    Article • May 2021, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Chandan Kumar Pandey

  26. Enhanced DC Performance of Junctionless Field-effect Transistor Using Dielectric Engineering

    Article • May 2021, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Chandan Kumar Pandey

  27. Performance Analysis of Gate-Stack Dual-Material DG MOSFET Using Work-Function Modulation Technique for Lower Technology Nodes

    Article • Silicon, April 2021, Springer Science + Business Media

    Dr. Chandan Kumar Pandey

  28. Improved DC Performances of Gate-all-around Si-Nanotube Tunnel FETs Using Gate-Source Overlap

    Article • Silicon, January 2021, Springer Science + Business Media

    Dr. Chandan Kumar Pandey

  29. Tuning of Threshold Voltage in Silicon Nano-Tube FET Using Halo doping and its Impact on Analog/RF Performances

    Article • Silicon, September 2020, Springer Science + Business Media

    Dr. Chandan Kumar Pandey

  30. Improvement in analog/RF performances of SOI TFET using dielectric pocket

    Article • International Journal of Electronics, May 2020, Taylor & Francis

    Dr. Chandan Kumar Pandey

  31. Effect of asymmetric gate–drain overlap on ambipolar behavior of double-gate TFET and its impact on HF performances

    Article • Applied Physics A, February 2020, Springer Science + Business Media

    Dr. Chandan Kumar Pandey

  32. Performance enhancement of double-gate tunnel FETs using dual-metal and graded-channel configuration

    Article • International Journal of Nanoparticles, January 2020, Inderscience Publishers

    Dr. Chandan Kumar Pandey

  33. Comparative analysis of silicon nano tube FET for switching applications using high K and work function modulation

    Article • International Journal of Nanoparticles, January 2020, Inderscience Publishers

    Dr. Chandan Kumar Pandey

  34. Design and analysis of High K Silicon Nano Tube Tunnel FET Device

    Article • IET Circuits Devices & Systems, October 2019, the Institution of Engineering and Technology (the IET)

    DR SAURABH CHAUDHURY, Dr. Chandan Kumar Pandey

  35. Structure, Stability and Electronic Properties of Thin TiO2 Nanowires of Different Novel Shapes: An Ab- initio Study

    Article • Scientia Iranica, March 2019, E-Ilmiah Penerbit Persatuan (E-scholarly Publishers Association)

    Dr. Chandan Kumar Pandey

  36. Comparative Study of High K in Silicon Nano Tube FET for Switching Applications

    Article • March 2019, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Chandan Kumar Pandey

  37. A Novel Structure of Double-Gate Tunnel FET with Extended Back Gate for Improved Device Performances

    Article • March 2019, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Chandan Kumar Pandey

  38. Analysis of Interface Trap Charges on Dielectric Pocket SOI-TFET

    Article • March 2019, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Chandan Kumar Pandey

  39. Structure and Electronic Properties of TiO2 Nanowires of Different Geometrical Shapes: An Abinitio Study

    Article • March 2019, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Chandan Kumar Pandey

  40. Structural, electronic, and mechanical properties of anatase titanium dioxide

    Article • Multidiscipline Modeling in Materials and Structures, February 2019, Emerald

    Dr. Chandan Kumar Pandey

  41. Effect of strain in silicon nanotube FET devices for low power applications

    Article • The European Physical Journal Applied Physics, January 2019, EDP Sciences

    Dr. Chandan Kumar Pandey

  42. Dual-Metal Graded-Channel Double-Gate Tunnel FETs for Reduction of Ambipolar Conduction

    Article • November 2018, Institute of Electrical & Electronics Engineers (IEEE)

    Dr. Chandan Kumar Pandey

  43. A Novel Structure of Tunnel FET with Suppressed Ambipolar Conduction Using Dielectric Pocket

    Article • Micro & Nano Letters, October 2018, the Institution of Engineering and Technology (the IET)

    DR SAURABH CHAUDHURY, Dr. Chandan Kumar Pandey

  44. DETERMINATION OF DIFFERENT OPTICAL PROPERTIES FOR CUBIC TITANIUM DIOXIDE: AN AB – INITIO APPROACH

    Article • Advances in Science and Technology – Research Journal, September 2018, Wydawnictwo Naukowe Gabriel Borowski (WNGB)

    Dr. Chandan Kumar Pandey

  45. Impact of Dielectric Pocket on Analog and High-Frequency Performances of Cylindrical Gate-All-Around Tunnel FETs

    Article • ECS Journal of Solid State Science and Technology, January 2018, The Electrochemical Society

    Dr. Chandan Kumar Pandey

  46. Structural, electronic, and mechanical properties of cubic TiO 2 : A first-principles study

    Article • Chinese Physics B, January 2018, Institute of Physics Publishing

    Dr. Chandan Kumar Pandey