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  1. Analysis of 14nm technology node In0.53Ga0.47As nFinFET integrated with In0.52Al0.48As cap layer for high-speed circuits
  2. Assessment of interface traps in In$_{0.53}$Ga$_{0.47}$As FinFET with Gate-to-Source/Drain underlap for sub-14nm technology node to impede Short Channel effect
  3. Adaptive filter design for impulsive noise
  4. Multiplier-less pipeline architecture for lifting-based two-dimensional discrete wavelet transform