A hardware system for the acceleration of the Semi-Global Matching stereo algorithm.

What is it about?

The Semi-Global Matching stereo algorithm (SGM) is a well known and widely used stereo matching procedure introduced by Hirshmuller. The algorithm receives input from two images and optimizes disparities accross specific image directions, minimizing the path cost to the current pixel. The algorithm is based on a cost function consisting of a data term and a smoothness term, as it is the case in global stereo methods. However, the sparse application of optimization across specific lines reduces the overall computational cost. Even so, the algorithm needs hardware acceleration in order to run in real-time, at high frame rates. We present a unique hardware implementation of the SGM algorithm.

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Photo by Bermix Studio on Unsplash

Photo by Bermix Studio on Unsplash

Why is it important?

Hardware pipelines for the acceleration of the Semi-Global Matching algorithm need to solve a data dependency problem, which imposes a computational bottleneck, in the computation of the smoothness term. This is because the smoothness term depends on the cost array computed at the previous pixel. Therefore, in order to compute the cost array L(p, d) at pixel p for all displacement values d, the values L(p-1, d) of the cost array at the previous pixel p-1 has to be available. Other publications approach the problem using row parallelism, meaning that they add cycles of computation at each pixel by processing pixels on different image lines, sucessively. We base our approach on the fast computation along the feedback loop, where the minima of large sets of values are computed in one clock cycle. A matrix of parallel comparators can accelerate the computation of the minima of large cost arrays and alleviate the computational bottleneck in the computation of the smoothness term. Implementations on Stratix V and UltraScale+ FPGA devices are presented. The system is less elaborate and more resource efficient than other implementations and its performance is compared favorably with them. A real-world on board implementation is also presented.

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