What is it about?

In the push for exascale compute capacity, processors specialization will bring heterogeneity directly into the main processor die. These processors require large capacity and high bandwidth memory for which can be facilitated by stacking DRAM die on these processors. The resulting architecture requires a heterogeneity-aware management of the shared DRAM cache resource for improved overall performance.

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Why is it important?

Adding the DRAM cache naively, leaves significant performance on the table due to the disparate demands from CPU and GPU cores for DRAM cache and memory accesses. In particular, the imbalance can significantly reduce the performance benefits that the CPU cores would have otherwise enjoyed with the introduction of the DRAMCache, necessitating a heterogeneity-aware management of this shared resource for improved performance.

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This page is a summary of: HAShCache, ACM Transactions on Architecture and Code Optimization, December 2017, ACM (Association for Computing Machinery), DOI: 10.1145/3158641.
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