All Stories

  1. A low latency and low power indirect topology for on-chip communication
  2. An Enhanced Simulation Framework for the Performance Evaluation of On-Chip Network Designs
  3. An optimized hybrid algorithm in term of energy and performance for mapping real time workloads on 2d based on-chip networks
  4. Network on chip simulators
  5. An Efficient Algorithm for Mapping Real Time Embedded Applications on NoC Architecture
  6. An Efficient and Scalable Cross-By-Pass-Mesh Architecture for On-Chip Communication
  7. Bandwidth-Constrained Multi-Objective Segmented Brute-Force Algorithm for Efficient Mapping of Embedded Applications on NoC Architecture