All Stories

  1. HeLO: A He terogeneous L ogic O ptimization Framework by Hierarchical Clustering and Graph Learning
  2. Buffer and Splitter Insertion for Adiabatic Quantum-Flux-Parametron Circuits
  3. Efficient Cartesian Genetic Programming-Based Automatic Synthesis Framework for Reversible Quantum-Flux-Parametron Logic Circuits
  4. TeMACLE: A Technology Mapping-Aware Area-Efficient Standard Cell Library Extension Framework
  5. RABER: Reliability-Aware Bayesian-Optimization-based Control Layer Escape Routing for Flow-based Microfluidics
  6. FlatDD: A High-Performance Quantum Circuit Simulator using Decision Diagram and Flat Array
  7. RCGP: An Automatic Synthesis Framework for Reversible Quantum-Flux-Parametron Logic Circuits based on Efficient Cartesian Genetic Programming
  8. JPlace: A Clock-Aware Length-Matching Placement for Rapid Single-Flux-Quantum Circuits
  9. DLPlace: A Delay-Line Clocking-Based Placement Framework for AQFP Circuits
  10. Exact Logic Synthesis for Reversible Quantum-Flux-Parametron Logic
  11. JRouter: A Multi-Terminal Hierarchical Length-Matching Router under Planar Manhattan Routing Model for RSFQ Circuits
  12. BOMIG: A Majority Logic Synthesis Framework for AQFP Logic
  13. A Global Optimization Algorithm for Buffer and Splitter Insertion in Adiabatic Quantum-Flux-Parametron Circuits
  14. A survey on superconducting computing technology: circuits, architectures and design tools
  15. JBNN: A Hardware Design for Binarized Neural Networks using Single-Flux-Quantum Circuits
  16. An Automatic Placement Algorithm for Superconducting Rapid Single-Flux-Quantum Logic Circuits
  17. Equivalence Checking for Superconducting RSFQ Logic Circuits
  18. Design Automation Methodology from RTL to Gate-level Netlist and Schematic for RSFQ Logic Circuits