All Stories

  1. An Efficient Quantum-Dot Cellular Automata Memory Architecture for Internet of Things Systems
  2. Design and Implementation of a Low-Power 8/9 Dual-Modulus Prescaler for High-Frequency Synthesizers
  3. Design of Low Power 2-Bit Comparator Using Transmission Gate Logic
  4. Design and Optimization of an Energy-Efficient High-Performance Serial Data Scrambler
  5. Design and Analysis of Low Power TSPC-based Serialiser and Deserialiser for On-Chip SerDes Transceivers
  6. Design and Analysis of Optimized Low Power Dual-Edge-Triggered Pulse Latches
  7. Design and Implementation of Low Power Pop Tracker Circuit
  8. CAN-SAT Based Artificial Cloud Seeding and Analysis of Atmospheric Parameters
  9. Design and Analysis of a 1-Bit Comparator for Low Power VLSI Systems
  10. High-Resolution Time Amplifier-Based Time-to-Digital Converter
  11. Performance analysis of low-power multi-threshold CMOS-based 10T SRAM cell
  12. Performance Analysis of 4-Bit Hybrid Low Power Carry Select Adder using FinFET Technology
  13. Performance Analysis of LCNMOS and MTCMOS-Based Low-Power 28 T Full Adders
  14. Area and Power Optimized RTL to GDS II Flow of a Telecommunication Receiver Core
  15. Performance Evaluation of Adder Topologies Integrated into MAC Units and MLP Model for Digit Recognition
  16. 8T-based Low-power CAM cell for Binary CAM Arrays
  17. QRS Peak Detection Using Statistical False Peak Elimination and Derivative Search Back
  18. Area and energy optimized Hamming encoder and decoder for nano-communication
  19. Area and Power Efficient AVLS-TSPC-Based Diffused Bit Generator for Key Generation
  20. Design and Analysis of Power and Area Efficient 4–2 Compressor Circuit for Tree Multiplier
  21. FPGA-Based Efficient MLP Neural Network for Digit Recognition
  22. Area and power efficient divide-by-32/33 dual-modulus pre-scaler using split-path TSPC with AVLS for frequency divider
  23. PCA and MLE-Based Statistical Factor Models for Asset Pricing
  24. AVLS-based 32/33 Pre-scaler for frequency dividers
  25. TSPC-AVLS Based Low-Power 16/17 Dual Modulus Pre-Scaler Design
  26. Automated Triaging of Gate Run Test Results using Humio Tool
  27. Secure Hashing using BCrypt for Cryptographic Applications
  28. Transition of Cloud Computing from Traditional Applications to the Cloud Native Approach
  29. Secure Bootloader for Connectivity MCU
  30. Low-Power Phase Frequency Detector Using Hybrid AVLS and LECTOR Techniques for Low-Power PLL
  31. Performance Evaluation of ML Algorithms for Disease Prediction Using DWT and EMD Techniques
  32. Face Mask Detection and Face Recognition of Unmasked People in Organizations
  33. Area and Energy Efficient QCA Based Compact Serial Concatenated Convolutional Code Encoder
  34. Performance Analysis of Machine Learning Algorithms in Detecting and Mitigating Black and Gray Hole Attacks
  35. Design and Simulation of a Direct-PSK Based Telecommand Receiver for Small Satellite
  36. Area and Energy Optimized QCA-Based Binary to Gray Code Converters
  37. Area and Energy Opimized QCA Based Shuffle-Exchange Network with Multicast and Broadcast Configuration
  38. Low Power Square Root Carry Select Adder Using AVLS-TSPC-Based D Flip-Flop
  39. Analysis of QCA-Based Serial Concatenated Convolution Coding Encoder for Error Correction
  40. Data and Bandwidth Analysis of CAN Bus in a System Using MATLAB
  41. Design and Implementation of Phase Frequency Detectors for Low-Power PLL
  42. Low-power modified phase-locked loop using AVLS technique for biomedical applications
  43. Design and Implementation of High Frequency and Low-Power Phase-locked Loop
  44. A Low Power Diffused Bit Generator as a TRNG for Cryptographic Key Generation
  45. Design of Compact and Energy Efficient Banyan Network for Nano Communication
  46. Design and Implementation of Power and Area Efficient Phase Frequency Detector
  47. Generation of Flash Containers in PDX Format for Automotive Secure Gateway
  48. Performance Analysis of MD5 and SHA-256 Algorithms to Maintain Data Integrity
  49. PFD with Dead zone based Low Power Modified Phase Lock Loop using AVLS Technique
  50. Area and Energy Efficient QCA based Decoder
  51. Low power add-one circuit IPGL based high speed square root carry select adder
  52. Adaptive Beamforming Using LMS Algorithm for Planar Arrays and Subarrays
  53. MEC S-box based PRESENT Lightweight Cipher for Enhanced Security and Throughput
  54. Development of Self Assisted Voice Module for Visually Impaired
  55. Estimation of Reverberation Time by Performing Acoustic Echo Cancellation Considering Near-end and Far-end Speech Signals
  56. Design and Analysis of QCA based Area Efficient 4×8 SRAM Array
  57. Design of QCA Based Three-Stage Pseudo Random Number Generator
  58. Performance Evaluation of Various Beamforming Techniques for Phased Array Antennas
  59. Design of Low Power Reduced Complexity Wallace Tree Multiplier Using Positive Feedback Adiabatic Logic
  60. Low-Power 8-Bit Adiabatic Barrel Shifter for DSP Applications
  61. A Novel QCA based Compact Scan Flip-flop for Digital Design Testing
  62. Low Power AVLS-TSPC based 2/3 Pre-Scaler
  63. Compact QCA based JK Flip-Flop for Digital System
  64. Low-Power PFAL Based Speculative Han-Carlson Adder for Signal Processing Applications
  65. Design of Low-Power Square Root Carry Select Adder and Wallace Tree Multiplier Using Adiabatic Logic
  66. Development of Hybrid Algorithm for Masquerading Sink Node Location in WSN
  67. Design and Analysis of Compact QCA Based 4-Bit Serial-Parallel Multiplier
  68. energy-efficient, coalition game theory based hierarchical routing protocol for WSNs
  69. Design of Low Power and High-Speed 16-bit Square Root Carry Select Adder using AL
  70. Design of Compact Vedic Multiplier for High Performance Circuits
  71. Design and Analysis of Low-Power 16-bit Parallel-Prefix Adiabatic Adders
  72. Design and performance analysis of modified unsigned braun and signed Baugh-Wooley multiplier
  73. Development of LIN 2.1 Driver with SAE Standards for RL78 Microcontroller
  74. Performance analysis of MANET routing protocols for military applications
  75. High spatial resolution hyperspectral image using fusion technique
  76. Impact of ERB and bark scales on perceptual distortion based near-end speech enhancement
  77. Improving the network lifetime of a wireless sensor network using clustering techniques
  78. Network performance analysis of MANET routing protocols with various mobility models
  79. Hardware validation for intelligibility improvement of NELE on DSP processor
  80. Design of low power 8-bit carry select adder using adiabatic logic
  81. Design of low power barrel shifter and vedic multiplier with kogge-stone adder using reversible logic gates
  82. Automation of device validation using digital power technology and PMBus communication
  83. A novel method of wideband acquisition and anti-sideband lock in PM receivers using FFT
  84. Design and performance analysis of FEC schemes in OFDM communication system
  85. Implementation of operand decomposition in signed logarithmic multipliers
  86. Lower and higher critical band enhancement to attain intelligibility improvement in noisy environment
  87. Approach to enhance the speech signal to mitigate background noise in Mobile phone.
  88. Design and Development of High-speed Data Acquisition System with Cyclone FPGA
  89. Dominant Frequency Enhancement of Speech Signal to Improve Intelligibility and Quality
  90. Selective Frequency Enhancement of Speech Signal for Intelligibility Improvement in Presence of Near-end Noise
  91. Speech enhancement using temporal masking in presence of near-end noise
  92. Design of area and power efficient complex number multiplier
  93. Speech enhancement to overcome the effect of near-end noise in mobile phones using psychoacoustics
  94. FPGA implementation for generation of six phase pulse compression sequences
  95. Signed fixed-point multiplier for DSP using vertically and crosswise algorithm
  96. Speech Enhancement Algorithm to Reduce the Effect of Background Noise in Mobile Phones
  97. Low Complexity Speech Enhancement Algorithm for Improved Perception in Mobile Devices