All Stories

  1. Design an Orderly Logic Gate to Construct Plasmids in GenoCAD

    Article • IET Systems Biology, April 2017, the Institution of Engineering and Technology (the IET)

    Miss Pei Shi

  2. Ramsey Algebras and Formal Orderly Terms

    Article • Notre Dame Journal of Formal Logic, January 2017, Duke University Press

    Miss Pei Shi

  3. Optical NOR logic gate design on square lattice photonic crystal platform

    Article • January 2016, American Institute of Physics

    Miss Pei Shi

  4. Design of a nanotori-metallofullerene logic gate

    Article • ANZIAM Journal, October 2015, Australian Mathematical Publishing Association, Inc.

    Miss Pei Shi

  5. Correction: Rule-Based Design of Plant Expression Vectors Using GenoCAD

    Article • PLOS One, August 2015, PLOS

    Miss Pei Shi

  6. Design of Two-Rail Checker Using a New Parity Preserving Reversible Logic Gate

    Article • International Journal of Computer Theory and Engineering, August 2015, IACSIT Press

    Miss Pei Shi

  7. Rule-Based Design of Plant Expression Vectors Using GenoCAD

    Article • PLOS One, July 2015, PLOS

    Miss Pei Shi

  8. Use of limited data to construct Bayesian networks for probabilistic risk assessment.

    Article • March 2013, Office of Scientific and Technical Information (OSTI)

    Miss Pei Shi

  9. Design of Testable Universal Logic Gate Targeting Minimum Wire-Crossings in QCA Logic Circuit

    Article • September 2010, Institute of Electrical & Electronics Engineers (IEEE)

    Miss Pei Shi

  10. Natural Logicism via the Logic of Orderly Pairing

    Article • January 2009, Springer Science + Business Media

    Miss Pei Shi

  11. CMOS logic design with independent-gate FinFETs

    Article • October 2007, Institute of Electrical & Electronics Engineers (IEEE)

    Miss Pei Shi

  12. Novel CNTFET-based Reconfigurable Logic Gate Design

    Article • June 2007, CrossRef Test Account

    Miss Pei Shi

  13. Novel CNTFET-based reconfigurable logic gate design

    Article • January 2007, ACM (Association for Computing Machinery)

    Miss Pei Shi

  14. The Logic of Passion

    Article • January 2005, Wiley

    Miss Pei Shi

  15. Bi-Decomposition of Function Sets in Multiple-Valued Logic for Circuit Design and Data Mining

    Article • January 2004, Springer Science + Business Media

    Miss Pei Shi

  16. Gate Arrays

    Article • March 2003, Taylor & Francis

    Miss Pei Shi

  17. Field-Programmable Gate Arrays

    Article • March 2003, Taylor & Francis

    Miss Pei Shi

  18. An improved polarization-encoded logic algebra (PLA) used for the design of an optical logic gate for a 2D data array: theory

    Article • Optics Communications, April 1995, Elsevier

    Miss Pei Shi

  19. Top-down design process for gate-level combinational logic design

    Article • IEEE Transactions on Education, January 1992, Institute of Electrical & Electronics Engineers (IEEE)

    Miss Pei Shi

  20. A new vector derived from Agrobacterium rhizogenes plasmids: a micro-Ri plasmid and its use to construct a mini-Ri plasmid

    Article • Gene, January 1987, Elsevier

    Miss Pei Shi

  21. CONSTRUCT YOUR OWN RELATIONAL DATA BASE

    Article • January 1986, Elsevier

    Miss Pei Shi

  22. Incremental Logic Synthesis through Gate Logic Structure Identification

    Article • January 1986, Institute of Electrical & Electronics Engineers (IEEE)

    Miss Pei Shi

  23. Gate Matrix Layout of Random Control Logic in a 32-bit CMOS CPU Chip Adaptable to Evolving Logic Design

    Article • January 1982, Institute of Electrical & Electronics Engineers (IEEE)

    Miss Pei Shi

  24. Digital Logic at the Gate and Functional Level

    Article • January 1979, Institute of Electrical & Electronics Engineers (IEEE)

    Miss Pei Shi

  25. Developments in Computer Simulation of Gate Level Physical Logic - a Tutorial

    Article • January 1979, Institute of Electrical & Electronics Engineers (IEEE)

    Miss Pei Shi

  26. Transmission Gate Logic Circuits

    Article • Springer Science + Business Media

    Miss Pei Shi

  27. 'Wireless Bimboards'-the use of programmable gate arrays in a logic design laboratory

    Article • Institute of Electrical & Electronics Engineers (IEEE)

    Miss Pei Shi

  28. Sequential Logic Gate Design and Timing

    Article • the Institution of Engineering and Technology (the IET)

    Miss Pei Shi

  29. logic product gate

    Article • Springer Science + Business Media

    Miss Pei Shi

  30. logic sum gate

    Article • Springer Science + Business Media

    Miss Pei Shi

  31. Logic Circuit Design with DGMOS Devices

    Article • Springer Science + Business Media

    Miss Pei Shi

  32. Guide to design structure diagrams for use in program design and other logic applications

    Article • BSI British Standards

    Miss Pei Shi

  33. Guide to design structure diagrams for use in program design and other logic applications

    Article • BSI British Standards

    Miss Pei Shi

  34. Guide to design structure diagrams for use in program design and other logic applications

    Article • BSI British Standards

    Miss Pei Shi

  35. Universal Logic Gate For Fpga Design

    Article • Institute of Electrical & Electronics Engineers (IEEE)

    Miss Pei Shi

  36. Orderly insertion

    Article • Cambridge University Press

    Miss Pei Shi

  37. Design of quaternary logic gate using double pass-transistor logic with neuron MOS down literal circuit

    Article • Institute of Electrical & Electronics Engineers (IEEE)

    Miss Pei Shi

  38. Figure 1—source data 2. Plasmids used in this study.

    Article • eLife

    Miss Pei Shi