All Stories

  1. AutoClock: Automated Clock Management for Power-Efficient HLS Designs on FPGAs
  2. GraFlex: Flexible Graph Processing on FPGAs through Customized Scalable Interconnection Network
  3. HLS directive search on multi-die FPGAs considering floorplan for co-optimizing cycles and frequency
  4. A Full-stack Infrastructure for Optical Neural Accelerator
  5. HLS directive search on multi-die FPGAs considering floorplan for co-optimizing cycles and frequency