All Stories

  1. FPGA‐based system for effective IQ imbalance mitigation of RF power amplifiers

    Article • International Journal of Circuit Theory and Applications, April 2020, Wiley

    Jose Alejandro Galaviz-Aguilar

  2. Linear channel estimation techniques for massive MIMO systems

    Article • IET Communications, February 2020, the Institution of Engineering and Technology (the IET)

    Cesar Vargas-Rosales, Diego Carrera, Jose Alejandro Galaviz-Aguilar

  3. Performance Improvement for Multi-User Millimeter-Wave Massive MIMO Systems

    Article • IEEE Access, January 2020, Institute of Electrical & Electronics Engineers (IEEE)

    Jose Alejandro Galaviz-Aguilar

  4. FPGA-Based Emulation of Sequential Least Squares for Coefficient Extraction of RF Power Amplifiers

    Article • November 2018, Institute of Electrical & Electronics Engineers (IEEE)

    Jose Alejandro Galaviz-Aguilar

  5. FPGA Realisation of n-QAM Digital Modulators

    Article • IETE Technical Review, June 2018, Taylor & Francis

    Jose Alejandro Galaviz-Aguilar

  6. Comparison of a genetic programming approach with ANFIS for power amplifier behavioral modeling and FPGA implementation

    Article • Soft Computing, November 2017, Springer Science + Business Media

    Jose Alejandro Galaviz-Aguilar

  7. Coefficients Estimation of MPM Through LSE, ORLS and SLS for RF-PA Modeling and DPD

    Article • September 2017, Springer Science + Business Media

    Jose Alejandro Galaviz-Aguilar

  8. Measurement and nonlinear behavioral modeling of the dynamic bias current in an LTE-A Chireix PA

    Article • Microwave and Optical Technology Letters, August 2017, Wiley

    Jose Alejandro Galaviz Aguilar, Jose Alejandro Galaviz-Aguilar

  9. Asymmetrically-driven current-based chireix class-F power amplifier designed using an embedding device model

    Article • June 2017, Institute of Electrical & Electronics Engineers (IEEE)

    Jose Alejandro Galaviz-Aguilar

  10. Direct design of Doherty and Chireix PAs using a nonlinear embedding device model

    Article • January 2017, Institute of Electrical & Electronics Engineers (IEEE)

    Jose Alejandro Galaviz-Aguilar

  11. Measurement of dynamic power dissipation and estimation of effective dynamic efficiencies in an LTE chireix PA

    Article • December 2016, Institute of Electrical & Electronics Engineers (IEEE)

    Jose Alejandro Galaviz-Aguilar

  12. FPGA realization of RF-PA models with memory effects based on ANFIS

    Article • November 2016, Institute of Electrical & Electronics Engineers (IEEE)

    Jose Alejandro Galaviz-Aguilar

  13. Behavioral Modeling for Power Amplifiers Comparing MPM, Wiener and Hammerstein with FPGA-Based Implementation

    Article • November 2016, Institute of Electrical & Electronics Engineers (IEEE)

    Jose Alejandro Galaviz-Aguilar

  14. FPGA-Based Modeling and Design Methodology of a Digital Pre-distortion System for Power Amplifier Linearization

    Article • November 2016, Institute of Electrical & Electronics Engineers (IEEE)

    Jose Alejandro Galaviz-Aguilar

  15. FPGA-based design and implementation of a phase detector to correct the I/Q imbalance

    Article • November 2015, Institute of Electrical & Electronics Engineers (IEEE)

    Jose Alejandro Galaviz-Aguilar

  16. Modeling memory effects in RF power amplifiers applied to a digital pre-distortion algorithm and emulated on a DSP-FPGA board

    Article • Integration, March 2015, Elsevier

    MS Calvillo-Téllez Andrés, Jose Alejandro Galaviz-Aguilar

  17. Measure-based modeling and FPGA implementation of RF Power Amplifier using a multi-layer perceptron neural network

    Article • February 2014, Institute of Electrical & Electronics Engineers (IEEE)

    Jose Alejandro Galaviz-Aguilar

  18. Amplification of 4-, 8-, 16-, 32- and 64-QAM through the Memory Polynomial-Model as Special Case of the Volterra Series Implemented in a RF Satellite Link

    Article • November 2012, Institute of Electrical & Electronics Engineers (IEEE)

    Jose Alejandro Galaviz-Aguilar