All Stories

  1. DNA: DC Nodal Analysis Attack for Evaluation of Analog Obfuscation Techniques
  2. EDA-schema: A Graph Datamodel Schema and Open Dataset for Digital Design Automation
  3. Harnessing Heterogeneity for Targeted Attacks on 3-D ICs
  4. Graph Representation Learning for Gate Arrival Time Prediction
  5. Transfer of Performance Models Across Analog Circuit Topologies with Graph Neural Networks
  6. RAPTA: A Hierarchical Representation Learning Solution For Real-Time Prediction of Path-Based Static Timing Analysis
  7. A Reinforced Learning Solution for Clock Skew Engineering to Reduce Peak Current and IR Drop
  8. SAT-attack Resilience Measure for Access Restricted Circuits
  9. Securing Analog Mixed-Signal Integrated Circuits Through Shared Dependencies
  10. On-Chip Power Supply Noise Suppression Through Hyperabrupt Junction Varactors
  11. Securing the Systems of the Future - Techniques for a Shifting Attack Space
  12. ElasticCore: A Dynamic Heterogeneous Platform With Joint Core and Voltage/Frequency Scaling
  13. Smart Grid on Chip: Work Load-Balanced On-Chip Power Delivery
  14. Work Load Scheduling For Multi Core Systems With Under-Provisioned Power Delivery
  15. Heterogeneous 3-D circuits: Integrating free-space optics with CMOS
  16. ElasticCore