All Stories

  1. Blockchain, Artificial Intelligence, and Cyber Defense on Sensor Networks

    Article • Sensors, April 2026, MDPI AG

    Hiroshi Watanabe

  2. De Broglie length of electrons in silicon conduction band

    Article • AIP Advances, May 2025, American Institute of Physics

    Hiroshi Watanabe

  3. Quantum mechanical effects on electrical properties of nanosheet FETs

    Article • IEEE Electron Devices Reviews, January 2025, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  4. Analysis of Dielectric Prebreakdown of High-kStacking Polycrystalline MIM by Stochastic Trap-Clusters Growing and Percolation-Based Transportation

    Article • IEEE Transactions on Electron Devices, September 2023, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  5. Proof of Authenticity of Logistics Information with Passive RFID Tags and Blockchain

    Article • December 2021, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  6. Trap-Related Reliability Problems of Dielectrics in Memory Cells

    Article • Electronics, May 2021, MDPI AG

    Hiroshi Watanabe

  7. How can chip technology realize electronic sensing of viruses?

    Article • April 2021, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  8. Impact on the Conductance Method of the Asymmetry in the AC Response Induced by Interface Trap Levels

    Article • ECS Journal of Solid State Science and Technology, April 2021, The Electrochemical Society

    Hiroshi Watanabe

  9. Dielectric Constant and van der Waals Interlayer Interaction of MoS2-Graphene Heterostructures

    Article • September 2020, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  10. Experimental Study of 1/f1+α Noise in Transient Leakage Current of Metal–Insulator–Metal With Stacked High-k Polycrystalline Films

    Article • IEEE Transactions on Electron Devices, June 2020, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  11. Efficient Sensing Properties of Aluminum Nitride Nanosheets toward Toxic Pollutants under Gated Electric Field

    Article • ACS Applied Electronic Materials, May 2020, American Chemical Society (ACS)

    Hiroshi Watanabe

  12. Graphene-Based Ultrasensitive Strain Sensors

    Article • ACS Applied Electronic Materials, February 2020, American Chemical Society (ACS)

    Hiroshi Watanabe

  13. Monte Carlo simulation of random dopant fluctuation in C–V characteristics using image charge model and adequately determined length scale

    Article • Japanese Journal of Applied Physics, August 2019, Institute of Physics Publishing

    Hiroshi Watanabe

  14. A Novel Chip-Level Blockchain Security Solution for the Internet of Things Networks

    Article • Technologies, March 2019, MDPI AG

    Hiroshi Watanabe

  15. Physics of Discrete Impurities under the Framework of Device Simulations for Nanostructure Devices

    Article • Materials, December 2018, MDPI AG

    Katsuhisa Yoshida, Hiroshi Watanabe

  16. Three-dimensional device simulation of random telegraph noise spectroscopy with Coulomb energy variation of the trap in high-k gate oxide

    Article • Japanese Journal of Applied Physics, November 2018, Institute of Physics Publishing

    Hiroshi Watanabe

  17. A Controlling Method of Nanowire Array Biosensor

    Article • July 2018, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  18. Monte Carlo Simulation of Nanowires Array Biosensor With AC Electroosmosis

    Article • IEEE Transactions on Electron Devices, May 2018, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  19. Localized Tunneling Phenomena of Nanometer Scaled High- ${K}$ Gate-Stack

    Article • IEEE Transactions on Electron Devices, August 2017, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  20. Monte-Carlo simulation of biomolecules' fluid-dynamics in electrolyte facing nanowires biosensor

    Article • July 2017, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  21. Nano-meter scaled gate area high-K dielectrics with trap-assisted tunneling and random telegraph noise

    Article • September 2014, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  22. Numerical Study of Very Small Floating Islands

    Article • IEEE Transactions on Electron Devices, April 2014, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  23. (Invited) Analysis of the Scaling Effect on NAND Flash Memory Cell Operation

    Article • ECS Transactions, April 2013, The Electrochemical Society

    Hiroshi Watanabe

  24. Quantitative Discussion on Electron-Hole Universal Tunnel Mass in Ultrathin Dielectric of Oxide and Oxide-Nitride

    Article • ECS Transactions, April 2011, The Electrochemical Society

    Hiroshi Watanabe

  25. Integrated Batteryless Electron Timer

    Article • IEEE Transactions on Electron Devices, March 2011, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  26. A Tight Binding Method Study of Optimized $\hbox{Si}{-} \hbox{SiO}_{2}$ System

    Article • IEEE Transactions on Electron Devices, November 2010, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  27. Statistical simulation of metal-gate work-function fluctuation in high-κ/metal-gate devices

    Article • September 2010, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  28. Transient Device Simulation of Floating Gate Nonvolatile Memory Cell With a Local Trap

    Article • IEEE Transactions on Electron Devices, August 2010, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  29. Universal Tunnel Mass and Charge Trapping in $[( \hbox{SiO}_{2})_{1-x} (\hbox{Si}_{3}\hbox{N}_{4})_{x}]_{1-y}\hbox{Si}_{y}$ Film

    Article • IEEE Transactions on Electron Devices, May 2010, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  30. Depletion-Type Cell-Transistor on Partial Silicon-on-Insulator Substrate for 2× nm Generation Floating-Gate NAND Electrically Erasable Programmable Read Only Memory

    Article • Japanese Journal of Applied Physics, April 2010, Institute of Physics Publishing

    Hiroshi Watanabe

  31. Trial Application of Tight-Binding Method to Si-Cluster Surrounded by SiO2 in Optimized Atomistic Network: Si-Cluster Surrounded SiO2 is Quite Unique

    Article • September 2009, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  32. Transient device simulation of trap-assisted leakage in non-volatile memory cell

    Article • September 2008, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  33. Numerical Study of $C$–$V$ Characteristics of Double-Gate Ultrathin SOI MOSFETs

    Article • IEEE Transactions on Electron Devices, January 2007, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  34. Statistics of Grain Boundaries in Polysilicon

    Article • IEEE Transactions on Electron Devices, January 2007, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  35. Determination of tunnel mass and physical thickness of gate oxide including poly-Si/SiO/sub 2/ and Si/SiO/sub 2/ interfacial transition Layers

    Article • IEEE Transactions on Electron Devices, June 2006, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  36. Depletion Layer of Gate Poly-Si

    Article • IEEE Transactions on Electron Devices, October 2005, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  37. Numerical Study of Data Retention Due to Direct Tunneling for Nonvolatile Memory Cell

    Article • IEEE Transactions on Electron Devices, May 2005, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  38. Statistics of Grain Boundaries in gate poly-Si

    Article • January 2005, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  39. Scaling effects on gate leakage current

    Article • IEEE Transactions on Electron Devices, August 2003, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  40. Experimental study on carrier transport mechanism in ultrathin-body SOI MOSFETs

    Article • January 2003, Institute of Electrical & Electronics Engineers (IEEE)

    Hiroshi Watanabe

  41. Effects of incomplete ionization of impurities in poly-Si gate and band gap narrowing on direct tunneling gate leakage current

    Article • Journal of Applied Physics, August 2001, American Institute of Physics

    Hiroshi Watanabe

  42. Model of Photoinduced Disaccommodation in Oxygen-deficient Yttrium Iron Garnet

    Article • Journal of the Magnetics Society of Japan, January 1999, The Magnetics Society of Japan

    Hiroshi Watanabe

  43. Hidden order and symmetry breaking in the ground state of a spin-1/2 antiferromagnetic Heisenberg ladder

    Article • Physical Review B, November 1995, American Physical Society (APS)

    Hiroshi Watanabe

  44. Numerical diagonalization study of anS=1/2 ladder model with open boundary conditions

    Article • Physical Review B, November 1994, American Physical Society (APS)

    Hiroshi Watanabe

  45. S=1/2 Quantum Heisenberg Ladder andS=1 Haldane Phase

    Article • Journal of the Physical Society of Japan, August 1993, Physical Society of Japan

    Hiroshi Watanabe

  46. Nonlocal Unitary Transformation and Haldane State inS=1/2 Antiferromagnetic Ladder Model

    Article • Journal of the Physical Society of Japan, January 1992, Physical Society of Japan

    Hiroshi Watanabe

  47. Hopping Transport of Electrons via Si-Dot

    Article • Springer Science + Business Media

    Hiroshi Watanabe