All Stories

  1. Real-time neural network-based thermal stress compensation for pressure sensors in precision localization systems
  2. Calibration-Free Edge-Computing IMC Macro With Direct Current-to-Digital Conversion
  3. Design Space Exploration of an In-Sensor Processor for Object Classification in Ultracompact Time-of-Flight Sensors
  4. Analysis of a 4H-SiC Lateral PMOSFET Temperature Sensor Between 14 K–482 K
  5. Anomalous I-V Characteristics of 4H-SiC p-i-n Diode at Cryogenic Temperature
  6. A 4H-SiC NMOSFET-Based Temperature Sensor Operating Between 14K and 481 K
  7. Multiclass Object Classification Using Ultra-Low Resolution Time-of-Flight Sensors
  8. A 4H-SiC CMOS SPICE Level 3 Model for Circuit Simulations
  9. A New Hardware Architecture for SVPWM Technique Based on the Taylor Decomposition
  10. Automatic Audio Feature Extraction for Keyword Spotting
  11. A 4H-SiC CMOS Oscillator-Based Temperature Sensor Operating from 298 K up to 573 K
  12. Design and Analysis of a Voltage Schmitt Trigger in 4H-SiC CMOS Technology
  13. In-Sensor System for Real-Time Compensation of Thermal Drift in MEMS Pressure Sensors
  14. Tiny Machine Learning Zoo for Long-Term Compensation of Pressure Sensor Drifts
  15. A DC SPICE Level 3 Model for 4H-SiC lateral NMOSFET under strong inversion conditions
  16. Low-complexity Machine Learning Architecture for Hardware-aware True Random Number Generators Assessment and Continuous Monitoring
  17. Low-power CNN for real-time driver posture monitoring by image processing
  18. In-sensor neural network for real-time KWS by image processing
  19. Tiny compensation of pressure drift measurements due to long exposures to high temperatures
  20. Ultra-Tiny Neural Network for Compensation of Post-soldering Thermal Drift in MEMS Pressure Sensors
  21. A New NN-Based Approach to In-Sensor PDM-to-PCM Conversion for Ultra TinyML KWS
  22. A 0.8 mW TinyML-Based PDM-to-PCM Conversion for In-Sensor KWS Applications
  23. A FPGA HardWare Architecture for AZSPWM Based on a Taylor Series Decomposition
  24. FPGA HardWare Architecture for SVPWM Based on a Taylor Series Decomposition
  25. A Novel FPGA HW Implementation for SVPWM Technique Using Taylor Series
  26. Polymer Insulator Processing‐Organic Transistor Performance Relationship Investigated through Admittance Spectroscopy
  27. A Hardware Architecture for SVPWM Digital Control With Variable Carrier Frequency and Amplitude
  28. Modeling of an Organic Thin Film Transistor as Temperature Sensor
  29. Quantized ID-CNN for a Low-power PDM-to-PCM Conversion in TinyML KWS Applications
  30. Low-Power Detection and Classification for In-Sensor Predictive Maintenance Based on Vibration Monitoring
  31. Processing–Structure–Performance Relationship in Organic Transistors: Experiments and Model
  32. Implementation of Hardware Architecture for SVPWM With Arbitrary Parameters
  33. Low-Power Anomaly Detection and Classification System based on a Partially Binarized Autoencoder for In-Sensor Computing
  34. Highly-accurate binary tiny neural network for low-power human activity recognition
  35. Linear organic transistor based temperature sensor between 230 and 330 K
  36. A Model of the V-T Characteristics for an OTFT Temperature Sensor
  37. Quantized Fully Convolution Neural Network for HW Implementation of Human Posture Recognition
  38. A Resource Constrained Neural Network for the Design of Embedded Human Posture Recognition Systems
  39. Design of Digital Controller for SVPWM Algorithm with Real-Time Control of the Output Amplitude and Switching Frequency
  40. On the design of the channel region in 4H-SiC JBS diode through an analytical model of the potential barrier
  41. Comparing Industry Frameworks with Deeply Quantized Neural Networks on Microcontrollers
  42. A Partially Binarized Hybrid Neural Network System for Low-Power and Resource Constrained Human Activity Recognition
  43. Low Power Tiny Binary Neural Network with improved accuracy in Human Recognition Systems
  44. Low-Power HWAccelerator for AI Edge-Computing in Human Activity Recognition Systems
  45. Embeddable Circuit for Orientation Independent Processing in Ultra Low-Power Tri-Axial Inertial Sensors
  46. A Fully FPGA Implementation of SVPWM for Three-phase Inverters without External Reference Signals
  47. A 4H-SiC UV Phototransistor With Excellent Optical Gain Based on Controlled Potential Barrier
  48. Analysis of the Potential Barrier on the Behaviour of 4H-SiC JBS Temperature Sensors
  49. Low-Power Integrated Circuit for Orientation Independent Acquisitions from Smart Accelerometers
  50. A Bit-Line Voltage Sensing Circuit With Fused Offset Compensation and Cancellation Scheme
  51. A Novel 4H-SiC UV Photo-transistor based on a Shallow Mesa Structure
  52. Performance of 4H-SiC Bipolar Diodes as Temperature Sensor at Low Temperatures
  53. First Experimental Test on Bipolar Mode Field Effect Transistor Prototype in 4H-SiC: A Proof of Concept
  54. µW Pre-processing Unit for Virtual Sensors Based on Tri-axial Smart Accelerometers
  55. Feasibility of 4H-SiC p-i-n Diode for Sensitive Temperature Measurements Between 20.5 K and 802 K
  56. Design of a Gabor Filter HW Accelerator for Applications in Medical Imaging
  57. Low-power Design of a Gravity Rotation Module for HAR Systems Based on Inertial Sensors
  58. Design Criteria for Real-time Processing of HW Gabor Filters in Visual Search
  59. V2O5/4H-SiC Schottky Diode Temperature Sensor: Experiments and Model
  60. Multiplier-Less Stream Processor for 2D Filtering in Visual Search Applications
  61. A V2O5/4H-SiC Schottky diode-based PTAT sensor operating in a wide range of bias currents
  62. An FPGA oprimization of a multiple resolution architecture for LDR to HDR image conversion
  63. Hardware accelerator using Gabor filters for image recognition applications
  64. Hardware architecture for 2D Gaussian filtering of HD images on resource constrained platforms
  65. Analysis of the performances of a fully 4H-SiC insultated DC/AC converters
  66. Dynamic range enhancement for medical image processing
  67. Evaluation of NB-PLC in railway environments
  68. Experimental results on lateral 4H-SiC UV photodiodes
  69. Losses of 4H-SiC DMOFET in high voltage power converters
  70. Optimal design of a Gabor filter for medical imaging applications
  71. Design of a Convolutional Two-Dimensional Filter in FPGA for Image Processing Applications
  72. Novel Advanced Analytical Design Tool for 4H-SiC VDMOSFET Devices
  73. Insights Into Interface Treatments in p-Channel Organic Thin-Film Transistors Based on a Novel Molecular Semiconductor
  74. Weighted Partitioning for Fast Multiplierless Multiple-Constant Convolution Circuit
  75. Application specific image processor for the extension of the dynamic range of images with multiple resolutions
  76. Analysis and modelling of the electric field in the Gate oxide of 4H-SiC DMOSFET
  77. Modelling the I-V-T characteristics of 4H-SiC DMOSFET in presence of SiO2/SiC interface traps and fixed oxide
  78. SiO2/4H-SiC interface traps effects on the input capacitance of DMOSFET
  79. Optimized Design for 4H-SiC Power DMOSFET
  80. Design and FPGA implementation of a real-time processor for the HDR conversion of images and videos
  81. FPGA optimization of convolution-based 2D filtering processor for image processing
  82. A Model of Electric Field Distribution in Gate Oxide and JFET-Region of 4H-SiC DMOSFETs
  83. Design of an offset-tolerant voltage sense amplifier bit-line sensing circuit for SRAM memories
  84. Frame buffer-less stream processor for accurate real-time interest point detection
  85. Analytical Model and Design of 4H-SiC Planar and Trenched JBS Diodes
  86. On the analogy of the potential barrier of trenched JFET and JBS devices
  87. Analytical Description of the Input Capacitance of 4H-SiC DMOSFET’s in Presence of Oxide-Semiconductor Interface Traps
  88. Modeling of the SiO2/SiC Interface-Trapped Charge as a Function of the Surface Potential in 4H-SiC Vertical-DMOSFET
  89. Divanadium Pentoxide/4H-silicon Carbide: A Schottky Contact for Highly Linear Temperature Sensors
  90. Stream Processor for Real-Time Inverse Tone Mapping of Full-HD Images
  91. Analytical Model of the Forward Operation of 4H-SiC Vertical DMOSFET in the Safe Operating Temperature Range
  92. Photovoltaic Behavior of V2O5/4H-SiC Schottky Diodes for Cryogenic Applications
  93. A model of the off-behaviour of 4H–SiC power JFETs
  94. Analytical Prediction of the Cross-Over Point in the Temperature Coefficient of the Forward Characteristics of 4H−SiC p+−i−n Diodes
  95. A Circuital Model of Switching Behaviour of 4H-SiC p+-n-n+ Diodes Valid at any Current and Temperature
  96. On the Crossing-Point of 4H-SiC Power Diodes Characteristics
  97. A Quasi-One-Dimensional Model of the Potential Barrier and Carrier Density in the Channel of Si and 4H-SiC BSITs
  98. An Analytical Model of the Switching Behavior of 4H-SiC p$^{\bm +}$ -n-n$^{\bm +}$ Diodes from Arbitrary Injection Conditions
  99. Design of a context-adaptive variable length encoder for real-time video compression on reconfigurable platforms
  100. Extension of the TPA method for the exact analysis of feedback circuits in terms of the return ratio
  101. A self-consistent model of the static and switching behaviour of 4H-SiC diodes
  102. An area reduced design of the Context-Adaptive Variable-Length encoder suitable for embedded systems
  103. A Self-Consistent Model of the OCVD Behavior of Si and 4H-SiC $\hbox{p}^{+}\hbox{-n-n}^{+}$ Diodes
  104. Limitations of the Open-Circuit Voltage Decay technique applied to 4H-SiC diodes
  105. An Analog Circuit for Accurate OCVD Measurements
  106. Physical model, measurement setup and experiments of a measurement technique of the carrier lifetime profile in power devices
  107. The effect of ITO surface energy on OLED electrical properties
  108. An Analytical Model of an OCVD-Based Measurement Technique of the Local Carrier Lifetime
  109. An H.264 Encoder for Real Time Video Processing Designed for SPEAr Customizable System-on-Chip Family
  110. Erratum to “Investigation of the damage as induced by 1.7 MeV protons in an amorphous/crystalline silicon heterojunction solar cell” [Solar Energy Materials & Solar Cells 83 (2004) 435–446]
  111. Test structure design for measuring electron and hole mobilities at very high injection levels
  112. Experimental measurements of majority and minority carrier lifetime profile in SI epilayers by the use of an improved OCVD method
  113. Investigation of the damage as induced by 1.7MeV protons in an amorphous/crystalline silicon heterojunction solar cell
  114. Modelling and characterisation of the OCVD response at an arbitrary time and injection level
  115. A novel measurement method of the spatial carrier lifetime profile based on the OCVD technique