All Stories

  1. Lagrange oscillatory neural networks for constraint satisfaction and optimization
  2. A Growing and Thriving Electronic Design, Automation, and Test Community: A DATE 2025 Perspective
  3. Foreword
  4. Monolithic 3D Oscillatory Ising Machine Using Reconfigurable FeFET Routing for Large‐Scalability and Low‐Power Consumption
  5. Conductive metal oxide and hafnium oxide bilayer resistive random-access memory: An ab initio study
  6. Computing with oscillators from theoretical underpinnings to applications and demonstrators
  7. DATE 2024: Consolidating the New Conference Format
  8. Implementation of FitzHugh-Nagumo Neurons using Nanoscale VO2 Devices
  9. Multi-qubit dynamical decoupling for enhanced crosstalk suppression
  10. Energy-Performance Assessment of Oscillatory Neural Networks Based on VO2 Devices for Future Edge AI Computing
  11. A CMOS-compatible oscillation-based VO2 Ising machine solver
  12. Roadmap for unconventional computing with nanotechnology
  13. Ab Initio Simulations on the Structure and Properties of Supported Core–Shell Pt Nanoparticles on Single-Layer MoS2
  14. Operating Coupled VO₂-Based Oscillators for Solving Ising Models
  15. How fast can vanadium dioxide neuron-mimicking devices oscillate? Physical mechanisms limiting the frequency of vanadium dioxide oscillators
  16. Multi-Programming Mechanism on Near-Term Quantum Computing
  17. Digital Implementation of On-Chip Hebbian Learning for Oscillatory Neural Network
  18. Energy-Efficient Machine Learning Acceleration: From Technologies to Circuits and Systems
  19. A mixed-signal oscillatory neural network for scalable analog computations in phase domain
  20. Oscillatory neural network learning for pattern recognition: an on-chip learning perspective and implementation
  21. Training energy-based single-layer Hopfield and oscillatory networks with unsupervised and supervised algorithms for image classification
  22. Two-Layered Oscillatory Neural Networks with Analog Feedforward Majority Gate for Image Edge Detection Application
  23. Toward power consumption reduction for image processing thanks to oscillatory neural network.
  24. qprof: A gprof-Inspired Quantum Profiler
  25. Supported Pt Nanoclusters on Single-Layer MoS2 for the Detection of Cortisol: From Atomistic Scale to Device Modeling
  26. Building Oscillatory Neural Networks
  27. Enabling Multi-programming Mechanism for Quantum Computing in the NISQ Era
  28. Simulation and implementation of two-layer oscillatory neural networks for image edge detection: bidirectional and feedforward architectures
  29. Non-volatile resistive switching mechanism in single-layer MoS2 memristors: insights from ab initio modelling of Au and MoS2 interfaces
  30. Role of ambient temperature in modulation of behavior of vanadium dioxide volatile memristors and oscillators for neuromorphic applications
  31. Réseaux de neurones oscillants pour des calculs économes en énergie
  32. Oscillatory Neural Network for Edge Computing: A Mobile Robot Obstacle Avoidance Application
  33. On-Chip Learning with a 15-neuron Digital Oscillatory Neural Network Implemented on ZYNQ Processor
  34. Oscillatory Neural Networks for Obstacle Avoidance on Mobile Surveillance Robot E4
  35. Simulation Toolchain for Neuromorphic Oscillatory Neural Networks Based on Beyond-CMOS Vanadium Dioxide Devices
  36. Electro-thermal simulations of beyond-CMOS vanadium dioxide devices and oscillators
  37. How Frequency Injection Locking Can Train Oscillatory Neural Networks to Compute in Phase
  38. Ab Initio Computer Simulations on Interfacial Properties of Single-Layer MoS2 and Au Contacts for Two-Dimensional Nanodevices
  39. Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation—Part I: CNFET Transistor Optimization
  40. Carbon Nanotube SRAM in 5-nm Technology Node Design, Optimization, and Performance Evaluation—Part II: CNT Interconnect Optimization
  41. Oscillatory Neural Network as Hetero-Associative Memory for Image Edge Detection
  42. How Parallel Circuit Execution Can Be Useful for NISQ Computing?
  43. Energy-Performance Assessment of Oscillatory Neural Networks based on VO2 Devices for Future Edge AI Computing
  44. Energy-Performance Assessment of Oscillatory Neural Networks based on VO2 Devices for Future Edge AI Computing
  45. Introduction to the Special Issue on Monolithic 3D: Technology, Design and Computing Systems Applications Perspectives
  46. Assessing doping strategies for monolayer MoS2 towards non-enzymatic detection of cortisol: a first-principles study
  47. Capillary-force-driven self-assembly of carbon nanotubes: from ab initio calculations to modeling of self-assembly
  48. Effects of Dynamical Decoupling and Pulse-Level Optimizations on IBM Quantum Computers
  49. Advanced Design Methods From Materials and Devices to Circuits for Brain-Inspired Oscillatory Neural Networks for Edge Computing
  50. Mapping Hebbian Learning Rules to Coupling Resistances for Oscillatory Neural Networks
  51. Dedicated Wearable Sensitive Strain Sensor, Based on Carbon Nanotubes, for Monitoring the Rat Respiration Rate
  52. Insights Into the Dynamics of Coupled VO2 Oscillators for ONNs
  53. Digital Implementation of Oscillatory Neural Network for Image Recognition Applications
  54. Oscillatory Neural Networks for Edge AI Computing
  55. Analyzing crosstalk error in the NISQ era
  56. Frequency Injection Locking-Controlled Oscillations for Synchronized Operations in VO2 Crossbar Devices
  57. Exploring 1D and 2D Nanomaterials for Health Monitoring Wearable Devices
  58. Multi-Scale Modeling and Simulation Flow for Oscillatory Neural Networks for Edge Computing
  59. Oscillatory Neural Networks Using VO2 Based Phase Encoded Logic
  60. Graphene and Carbon Nanotubes for Electronics Nanopackaging
  61. 1D Nanomaterial-Based Highly Stretchable Strain Sensors for Human Movement Monitoring and Human-Robotic Interactive Systems
  62. Stretchable Strain Sensors for Human Movement Monitoring
  63. Review—Energy Autonomous Wearable Sensors for Smart Healthcare: A Review
  64. A Hardware-Aware Heuristic for the Qubit Mapping Problem in the NISQ Era
  65. Importance of Interconnects: A Technology-System-Level Design Perspective
  66. Emerging technologies and computing paradigms for the Internet of Everything applications. International Journal of Circuit, Theory, and Applications
  67. Investigation of Pt-Salt-Doped-Standalone- Multiwall Carbon Nanotubes for On-Chip Interconnect Applications
  68. Reliable Power Delivery and Analysis of Power-Supply Noise During Testing in Monolithic 3D ICs
  69. Editorial TVLSI Positioning—Continuing and Accelerating an Upward Trajectory
  70. Power-Supply Noise Analysis for Monolithic 3D ICs Using Electrical and Thermal Co-Simulation
  71. A high-reliability and low-power computing-in-memory implementation within STT-MRAM
  72. Atomistic- to Circuit-Level Modeling of Doped SWCNT for On-Chip Interconnects
  73. Power Supply Noise Aware Task Scheduling on Homogeneous 3D MPSoCs Considering the Thermal Constraint
  74. Understanding Electromigration in Cu-CNT Composite Interconnects: A Multiscale Electrothermal Simulation Study
  75. A Robust Dual Reference Computing-in-Memory Implementation and Design Space Exploration Within STT-MRAM
  76. Resistance Scaling of Cu Interconnect and Alternate Metal (Co, Ru) Benchmark toward sub 10nm Dimension
  77. Challenges and Progress on Carbon Nanotube Integration for BEOL Interconnects
  78. Addressing the Thermal Issues of STT-MRAM From Compact Modeling to Design Techniques
  79. Progress on carbon nanotube BEOL interconnects
  80. Variability Study of MWCNT Local Interconnects Considering Defects and Contact Resistances--Part I: Pristine MWCNT
  81. Variability Study of MWCNT Local Interconnects Considering Defects and Contact Resistances--Part II: Impact of Charge Transfer Doping
  82. Physical Design for 3D Integrated Circuits
  83. Design Methodology for 3D Power Delivery Networks *
  84. A physics-based investigation of Pt-salt doped carbon nanotubes for local interconnects
  85. Synchronised 4-Phase Resonant Power Clock Supply for Energy Efficient Adiabatic Logic
  86. Electromigration Alleviation Techniques for 3D Integrated Circuits
  87. Atomistic to circuit level modeling of defective doped SWCNTs with contacts for on-chip interconnect application
  88. Atoms-to-circuits simulation investigation of CNT interconnects for next generation CMOS technology
  89. The impact of vacancy defects on CNT interconnects: From statistical atomistic study to circuit simulations
  90. Electrical performance of carbon-based power distribution networks with thermal effects
  91. Guest Editorial Special Issue on Nanoelectronic Circuit and System Design Methods for the Mobile Computing Era
  92. A Survey of Carbon Nanotube Interconnects for Energy Efficient Integrated Circuits
  93. Carbon Nanotubes for Interconnects
  94. Editorial
  95. Temperature Impact Analysis and Access Reliability Enhancement for 1T1MTJ STT-RAM
  96. A Study of 3-D Power Delivery Networks With Multiple Clock Domains
  97. Alleviating Through-Silicon-Via Electromigration for 3-D Integrated Circuits Taking Advantage of Self-Healing Effect
  98. Front matters
  99. Investigation of electrical and thermal properties of carbon nanotube interconnects
  100. Physical description and analysis of doped carbon nanotube interconnects
  101. Exploring Carbon Nanotubes for 3D Power Delivery Networks
  102. Electrothermal Analysis of Carbon Nanotubes Power Delivery Networks for Nanoscale Integrated Circuits
  103. A clustering technique for fast electrothermal analysis of on-chip power distribution networks
  104. Investigation of the power-clock network impact on adiabatic logic
  105. Quantitative evaluation of reliability and performance for STT-MRAM
  106. Present and future prospects of carbon nanotube interconnects for energy efficient integrated circuits
  107. Reliability and performance evaluation for STT-MRAM under temperature variation
  108. Guest Editorial
  109. On Analysis of On-chip DC-DC Converters for Power Delivery Networks
  110. An architecture-level cache simulation framework supporting advanced PMA STT-MRAM
  111. Carbon-based Power Delivery Networks for nanoscale ICs: electrothermal performance analysis
  112. Message from the General and Program Chairs
  113. On the Performance Exploration of 3D NoCs with Resistive-Open TSVs
  114. A node clustering reduction scheme for power grids electrothermal analysis
  115. Towards a Digital Attribution Model: Measuring the Impact of Display Advertising on Online Consumer Behavior
  116. A Delay Probability Metric for Input Pattern Ranking Under Process Variation and Supply Noise
  117. Evaluating a radiation monitor for mixed-field environments based on SRAM technology
  118. Investigation of horizontally aligned carbon nanotubes for efficient power delivery in 3D ICs
  119. An intra-cell defect grading tool
  120. Protecting combinational logic in pipelined microprocessor cores against transient and permanent faults
  121. Test and diagnosis of power switches
  122. Timing-aware ATPG for critical paths with multiple TSVs
  123. On the reuse of read and write assist circuits to improve test efficiency in low-power SRAMs
  124. A novel method to mitigate TSV electromigration for 3D ICs
  125. Worst-case power supply noise and temperature distribution analysis for 3D PDNs with multiple clock domains
  126. Analyzing resistive-open defects in SRAM core-cell under the effect of process variability
  127. Computing detection probability of delay defects in signal line tsvs
  128. Frequency domain power and thermal integrity analysis of 3D power delivery networks
  129. A built-in scheme for testing and repairing voltage regulators of low-power srams
  130. Effect-cause intra-cell diagnosis at transistor level
  131. Test Solution for Data Retention Faults in Low-Power SRAMs
  132. Why and How Controlling Power Consumption during Test: A Survey
  133. Defect analysis in power mode control logic of low-power SRAMs
  134. Through-Silicon-Via resistive-open defect analysis
  135. Impact of resistive-open defects on the heat current of TAS-MRAM architectures
  136. Failure Analysis and Test Solutions for Low-Power SRAMs
  137. Power-Aware Test Pattern Generation for At-Speed LOS Testing
  138. Power supply noise and ground bounce aware pattern generation for delay testing
  139. Enhancement of the ATLAS trigger system with a hardware tracker finder FTK
  140. Reliability and performance studies of DC-DC conversion powering scheme for the CMS pixel tracker at SLHC
  141. Proposal for the development of 3D Vertically Integrated Pattern Recognition Associative Memory (VIPRAM)
  142. Performance studies of CMS Pixel Tracker using DC-DC conversion powering scheme
  143. Power distribution studies for CMS forward tracker
  144. Electromigration study of power-gated grids
  145. Power supply noise aware workload assignment for multi-core systems
  146. A study of reliability issues in clock distribution networks
  147. Exploration of carbon nanotubes for efficient power delivery
  148. Lumped electro-thermal modeling and analysis of carbon nanotube interconnects