What is it about?
A proven transformation, with bisimilarity equivalence, of a subset of UML state machines extended with some temporal features, to timed automata.
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Why is it important?
A generic abstract syntax is defined for state machines, which allows us to specify state machines as a tree-like structure, thus explicitly illustrating the hierarchical relationships within the model. Based on this syntax, a formal asynchronous semantics for state machines and systems of state machines is established. Additionally, the semantics of timed automata is specified. Then, a translation relation from the considered set of state machines to timed automata is defined and a strong equivalence relation, namely a timed bisimulation between the source and target models, is formally proven.
Perspectives
We want to extend our source model (SM) to take into account additional features that are not considered so far in our translation, such as final states, History pseudo-states, entry/exit/do behaviors and forks/joins. We also wish to minimize the number of timed automata clocks generated through our translation. A possible way is to create clocks dynamically as in time Petri Nets, or Stateful Timed CSP. We should also mention that in the current study, we mainly focused on the soundness of the translation and the timed bisimulation preservation. This explains some choices such as, for instance, regarding the syntax statement, to help us derive our proof. Nevertheless, some abstraction should be possible regarding the way the utilized syntaxes are stated. Moreover, to be able to conduct our translation and prove the equivalence, we had to fix several choices in terms of syntax and semantics in both the source and target models. Yet, regarding the possibility to adopt different choices and/or extend the subset of the UML SM specifications to consider, we believe that the present contribution can serve as a relevant basis. In addition, after having manually demonstrated the existence of a bisimulation relation between SMs and TA, we are paving the way for validating our translation process by theorem provers. Indeed, by bringing a completely (manual) formal translation, that is entirely based on set theory, we have shown that the translation is perfectly encodable using theorem prover tools. What may prove to be harder, nevertheless, is the handling of bisimulation and its proof. We believe that, if a support to our translation is set by means of a theorem prover, for instance, this would greatly simplify coping with different choices and/or extensions regarding the considered subset of UML SMs.
Mohamed Ghazel
Read the Original
This page is a summary of: A Proven Translation from a UML State Machine Subset to Timed Automata, ACM Transactions on Embedded Computing Systems, August 2024, ACM (Association for Computing Machinery),
DOI: 10.1145/3581771.
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