What is it about?
Detailed description of a hardware HEVC video encoder implementation using C++ and high-level synthesis. This article is the culmination of the authors multiple preceding conference publications, all considering different parts of the implementation process. Previous publications consider more individual algorithms, as in this article considers the whole HEVC encoder and the benefits that high-level synthesis enabled.
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Why is it important?
This work describes for the first time the benefit of using high-level synthesis entirely for the implementation of the HEVC video encoder, while achieving excellent performance and productivity
Perspectives
This article is the culmination of the authors multiple preceding conference publications, all considering different parts of the implementation process. Previous publications consider more individual algorithms, as in this article considers the whole HEVC encoder and the benefits that high-level synthesis enabled.
Panu Sjövall
Tampereen yliopisto
Read the Original
This page is a summary of: High-Level Synthesis Implementation of an Embedded Real-Time HEVC Intra Encoder on FPGA for Media Applications, ACM Transactions on Design Automation of Electronic Systems, July 2022, ACM (Association for Computing Machinery),
DOI: 10.1145/3491215.
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