Evaluating generalized semi Markov process model of SoC bus architectures using HCFG

Ulhas Deshmukh, Vineet Sahula
  • November 2009, Institute of Electrical & Electronics Engineers (IEEE)
  • DOI: 10.1109/tencon.2009.5395938

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http://dx.doi.org/10.1109/tencon.2009.5395938

The following have contributed to this page: Professor Vineet Sahula