Publication not explained

This publication has not yet been explained in plain language by the author(s). However, you can still read the publication.

If you are one of the authors, claim this publication so you can create a plain language summary to help more people find, understand and use it.

Featured Image

Read the Original

This page is a summary of: Boosting the SOI MOSFET Electrical Performance by Using the Octagonal Layout Style in High Temperature Environment, IEEE Transactions on Device and Materials Reliability, March 2017, Institute of Electrical & Electronics Engineers (IEEE),
DOI: 10.1109/tdmr.2017.2652729.
You can read the full text:

Read

Contributors

The following have contributed to this page