What is it about?

In this paper different pulse width modulation techniques are analyzed for seven-level diode clamped multi-level inverter interns of THD, fundamental output voltages and DC-link voltage balancing. Multi-level Inverters are emerged as suitable drive for speed control of motors and power quality controller in case of Utility. The performance indices such as THD, fundamental output voltages, dc link voltages, torque ripples etc has to improved for wider usage of these converter even though its has their own advantages over two-level inverter. A detailed analysis has carried by implementing various PWM techniques

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Why is it important?

Total harmonic distortion, balancing of the DC-link voltages and torque ripple minimization are the major concerns incase of multi-level inverters. Better PWM techniques are required to make it a effective variable speed drive


This paper has shown with hardware implementation of most effective PWM techniques. Digital implementation is bit tough while choosing some of PWM techniques such as SVPWM technique. In this paper different multi-carrier PWM techniques were programmed using VHDL coder in Xilinx ISE design Tool. Easy digital implantation of the proposed system has achieved. A detailed analysis of the indices has tabulated at the end to easy understanding.

Mr muddasani satyanarayana

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This page is a summary of: Comparative analysis of modulation strategies applied to seven-level diode clamped multi-level inverter fed induction motor drive, December 2015, Institute of Electrical & Electronics Engineers (IEEE), DOI: 10.1109/pccctsg.2015.7503893.
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