Voltage profile enhancement through optimal placement of FACTS devices using Queen-Bee-Assisted GA

K. Sundareswaran, P. Bharathram, M. Siddharth, G Vaishnavi, Nitin Anand Shrivastava, Harish Sarma
  • January 2009, Institute of Electrical & Electronics Engineers (IEEE)
  • DOI: 10.1109/icpws.2009.5442669

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http://dx.doi.org/10.1109/icpws.2009.5442669

The following have contributed to this page: Dr NITIN ANAND SHRIVASTAVA