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This paper proposed novel approaches to autonomously classifying the region of an FPGA affected by soft errors at run time, and rapidly reconfiguring the identified regions in a very fine-grained manner.
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This page is a summary of: Fine-grained module-based error recovery in FPGA-based TMR systems, December 2016, Institute of Electrical & Electronics Engineers (IEEE),
DOI: 10.1109/fpt.2016.7929433.
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