A new multilevel inverter topology with reduced device count and blocking voltage

Piyush L. Kamani, Mahmadasraf A. Mulla
  • June 2016, Institute of Electrical & Electronics Engineers (IEEE)
  • DOI: 10.1109/eeeic.2016.7555722

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http://dx.doi.org/10.1109/eeeic.2016.7555722

The following have contributed to this page: Piyushkumar Kamani and Dr. Mahmadasraf Mulla