Variable precision arithmetic circuits for FPGA-based multimedia processors

  • S. Perri, P. Corsonello, M.A. Iachino, M. Lanuzza, G. Cocorullo
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems, September 2004, Institute of Electrical & Electronics Engineers (IEEE)
  • DOI: 10.1109/tvlsi.2004.833400

The authors haven't finished explaining this publication. If you are the author, sign in to claim or explain your work.

Read Publication

http://dx.doi.org/10.1109/tvlsi.2004.833400

The following have contributed to this page: Dr Marco Lanuzza