A parallel decimal adder with carry correction during binary accumulation

  • Kuan Jen Lin, Ju Lin Shih, Tsz Hao Lin, Yu Mei Wang
  • June 2012, Institute of Electrical & Electronics Engineers (IEEE)
  • DOI: 10.1109/newcas.2012.6328966

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http://dx.doi.org/10.1109/newcas.2012.6328966