A Novel BIST TPG for Testing of VLSI Circuits

K. Gunavathi, K. Paramasivam, P. Subashini Lavanya, M. Umamageswaran
  • August 2006, Institute of Electrical & Electronics Engineers (IEEE)
  • DOI: 10.1109/iciis.2006.365646

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http://dx.doi.org/10.1109/iciis.2006.365646