High voltage NMOS double hump prevention by using baseline CMOS p-well implant

  • Elizabeth Kho Ching Tee, Deb Kumar Pal, Swee Hua Tia, Yong Hai Hu
  • April 2010, Institute of Electrical & Electronics Engineers (IEEE)
  • DOI: 10.1109/icedsa.2010.5503059

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http://dx.doi.org/10.1109/icedsa.2010.5503059