Analysis of the System Level Design of a 1.5 Bit/Stage Pipeline ADC

  • Amit Kumar Tripathi, Rishi Singhal, Anurag Verma
  • February 2014, Institute of Electrical & Electronics Engineers (IEEE)
  • DOI: 10.1109/acct.2014.96

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http://dx.doi.org/10.1109/acct.2014.96