An empirical three-dimensional crossover capacitance model for multilevel interconnect VLSI circuits

  • Shyh-Chyi Wong, Trent Gwo-Yann Lee, Dye-Junn Ma, Chuan-Jane Chao
  • IEEE Transactions on Semiconductor Manufacturing, May 2000, Institute of Electrical & Electronics Engineers (IEEE)
  • DOI: 10.1109/66.843637

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http://dx.doi.org/10.1109/66.843637