X-band Core Chip SiGe design for Phased Array T/R Modules

  • Valeri Timoshenkov, Andrey Efimov
  • MATEC Web of Conferences, January 2017, EDP Sciences
  • DOI: 10.1051/matecconf/201712501002

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http://dx.doi.org/10.1051/matecconf/201712501002