Publication not explained
This publication has not yet been explained in plain language by the author(s). However, you can still read the publication.
If you are one of the authors, claim this publication so you can create a plain language summary to help more people find, understand and use it.
Featured Image
Read the Original
This page is a summary of: Active Stabilisation Design of DC-DC Converters with CPL load Using a Sampled Discrete-Time Model: Stability Analysis and Experimental Verification , IET Power Electronics, March 2018, the Institution of Engineering and Technology (the IET),
DOI: 10.1049/iet-pel.2017.0670.
You can read the full text:
Contributors
The following have contributed to this page