Implementation of a new medium voltage asymmetric pulse-width modulation converter with balanced input capacitor voltages

Bor-Ren Lin, Sheng-Zhi Zhang
  • IET Power Electronics, August 2015, the Institution of Engineering and Technology (the IET)
  • DOI: 10.1049/iet-pel.2014.0760

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http://dx.doi.org/10.1049/iet-pel.2014.0760

The following have contributed to this page: Professor BOR-REN LIN