What is it about?
This work is for building up a large scale computer chips to save power consumption and be robust to errors
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Why is it important?
Develop a power efficient error correcting capabilities with minimized hardware cost in on-chip network
Perspectives
I hope this article to be helpful for chip designers who have interests in next generation chips using nano-scale fabrication technologies.
TAE HEE HAN
Sungkyunkwan University
Read the Original
This page is a summary of: Power-efficient error-resilient network-on-chip router using selective error correction code scheme , Electronics Letters, October 2018, the Institution of Engineering and Technology (the IET),
DOI: 10.1049/el.2018.5389.
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