What is it about?
In logic circuit design, when there is a large, isolated wire load in the critical path, pipelining may be not trivial because the pipeline stage that contain the long wire is intrinsically slower. In principle, such penalty should be compensated by fewer logic depth in the overloaded stage, and/or by partitioning the large load among multiple pipeline stages. This work formalize the problem to obtain the optimal solution.
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Why is it important?
Pipeline stage balancing is essential in high performance digital architecture design
Perspectives
This article came out as a new finding while studying the general problem of designing near-threshold-voltage pipelined microprocessors.
Mauro Olivieri
Universita degli Studi di Roma La Sapienza
Read the Original
This page is a summary of: Optimal pipeline stage balancing in the presence of large isolated interconnect delay , Electronics Letters, December 2016, the Institution of Engineering and Technology (the IET),
DOI: 10.1049/el.2016.4262.
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