Fully Synthesized Pulse Injection Locked Bang-Bang PLL

What is it about?

This paper presents a fully synthesized sub-harmonically pulse injection locked all-digital bang-bang phased-locked loop (BBPLL). A new output feedback digital to analog converter and a fine resolution custom varactor are proposed to enhance the frequency control linearity of the DCO and to improve the resolution of the DCO, respectively. A fast locking technique is proposed to improve the locking speed of the BBPLL. BBPLL is described in hardware language and automatically placed & routed by using standard digital circuit design flow. It is implemented in 65 nm CMOS with an active area of 0.008 〖mm〗^2.

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Why is it important?

This paper proposes a fully synthesized sub-harmonically pulse injection locked all-digital bang-bang phased-locked loop (BBPLL). The BBPLL structure has an important advantage that tolerances the system mismatches and process variations introduced by the APR procedure. An output feedback digital to analog converter (OFDAC) and a fine resolution custom varactor are proposed to improve the frequency tuning linearity and resolution of the DCO, respectively. A new second order adaptive loop gain control (ALGC) based fast locking technique is proposed to improve the locking speed of the BBPLL. An NMOS cell based sub-harmonically pulse injection locked technique [7] is adopted to eliminate the jitter accumulation at every reference cycle.

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