Making bipolar flip-flops twice as fast

What is it about?

This article describes a method to speed up bipolar flip-flops by up to 100% while burnig more power. It is meant for cases where bipolar flip-flop clock rate limits the performance of a system, e.g. the first stage of a clock divider tree, a decision-feedback amplifer, comparators of an ADC etc.

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Why is it important?

If bipolar flip-flops are used, it is mostly for their superior speed over CMOS logic. In many cases, the upper limit to the clock rate of a few critical flip-flops limits the overall performance of the system. Thus, increasing it may be beneficial, even if it may consume more power.