A novel low-power full-adder cell with new technique in designing logical gates based on static CMOS inverter

K. Navi, V. Foroutan, M. Rahimi Azghadi, M. Maeen, M. Ebrahimpour, M. Kaveh, O. Kavehei
  • Microelectronics Journal, October 2009, Elsevier
  • DOI: 10.1016/j.mejo.2009.06.005
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The following have contributed to this page: Dr Omid Kavehei