All Stories

  1. Domain-oriented masked bit-parallel finite-field multiplier against side-channel attacks

    Article • Information Processing Letters, August 2023, Elsevier

    PhD José L Imaña

  2. Decomposition of Dillon’s APN Permutation with Efficient Hardware Implementation

    Article • January 2023, Springer Science + Business Media

    PhD José L Imaña

  3. Work-in-Progress: High-Performance Systolic Hardware Accelerator for RBLWE-based Post-Quantum Cryptography

    Article • October 2022, Institute of Electrical & Electronics Engineers (IEEE)

    PhD José L Imaña

  4. Efficient Hardware Arithmetic for Inverted Binary Ring-LWE Based Post-Quantum Cryptography

    Article • IEEE Transactions on Circuits and Systems I Regular Papers, August 2022, Institute of Electrical & Electronics Engineers (IEEE)

    PhD José L Imaña

  5. Low-Delay FPGA-Based Implementation of Finite Field Multipliers

    Article • IEEE Transactions on Circuits & Systems II Express Briefs, August 2021, Institute of Electrical & Electronics Engineers (IEEE)

    PhD José L Imaña

  6. Efficient Hardware Implementation of Finite Field Arithmetic AB+C for Binary Ring-LWE Based Post-Quantum Cryptography

    Article • IEEE Transactions on Emerging Topics in Computing, January 2021, Institute of Electrical & Electronics Engineers (IEEE)

    PhD José L Imaña

  7. Optimized reversible quantum circuits for $${\mathbb {F}}_{2^8}$$ multiplication

    Article • Quantum Information Processing, January 2021, Springer Science + Business Media

    PhD José L Imaña

  8. High-throughput architecture for post-quantum DME cryptosystem

    Article • Integration, November 2020, Elsevier

    PhD José L Imaña

  9. FPGA Implementation of Post-Quantum DME Cryptosystem

    Article • May 2020, Institute of Electrical & Electronics Engineers (IEEE)

    PhD José L Imaña

  10. LFSR-based Bit-Serial $GF(2^m)$ Multipliers using Irreducible Trinomials

    Article • IEEE Transactions on Computers, January 2020, Institute of Electrical & Electronics Engineers (IEEE)

    PhD José L Imaña

  11. Fast Bit-Parallel Binary Multipliers Based on Type-I Pentanomials

    Article • IEEE Transactions on Computers, June 2018, Institute of Electrical & Electronics Engineers (IEEE)

    PhD José L Imaña

  12. Efficient FPGA Implementation of Binary Field Multipliers Based on Irreducible Trinomials

    Article • April 2018, Institute of Electrical & Electronics Engineers (IEEE)

    PhD José L Imaña

  13. Reconfigurable implementation of GF(2m) bit-parallel multipliers

    Article • March 2018, Institute of Electrical & Electronics Engineers (IEEE)

    PhD José L Imaña

  14. Low-delay AES polynomial basis multiplier

    Article • Electronics Letters, May 2016, the Institution of Engineering and Technology (the IET)

    PhD José L Imaña

  15. High-Speed Polynomial Basis Multipliers Over GF(2m) for Special Pentanomials

    Article • IEEE Transactions on Circuits and Systems I Regular Papers, January 2016, Institute of Electrical & Electronics Engineers (IEEE)

    PhD José L Imaña

  16. Low complexity bit-parallel polynomial basis multipliers over binary fields for special irreducible pentanomials

    Article • Integration, March 2013, Elsevier

    PhD José L Imaña

  17. Efficient Elliptic Curve Point Multiplication Using Digit-Serial Binary Field Operations

    Article • IEEE Transactions on Industrial Electronics, January 2013, Institute of Electrical & Electronics Engineers (IEEE)

    PhD José L Imaña

  18. Efficient Polynomial Basis Multipliers for Type-II Irreducible Pentanomials

    Article • IEEE Transactions on Circuits & Systems II Express Briefs, November 2012, Institute of Electrical & Electronics Engineers (IEEE)

    PhD José L Imaña

  19. Modular Multiplication and Exponentiation Architectures for Fast RSA Cryptosystem Based on Digit Serial Computation

    Article • IEEE Transactions on Industrial Electronics, July 2011, Institute of Electrical & Electronics Engineers (IEEE)

    PhD José L Imaña

  20. Low Latency $GF(2^{m})$ Polynomial Basis Multiplier

    Article • IEEE Transactions on Circuits and Systems I Regular Papers, May 2011, Institute of Electrical & Electronics Engineers (IEEE)

    PhD José L Imaña

  21. Efficient FPGA Modular Multiplication and Exponentiation Architectures Using Digit Serial Computation

    Article • August 2010, Institute of Electrical & Electronics Engineers (IEEE)

    PhD José L Imaña

  22. Probabilistic Verification over GF(2m) Using Mod2-OBDDs

    Article • Intelligent Information Management, January 2010, Scientific Research Publishing, Inc,

    PhD José L Imaña

  23. Low Complexity Bit-Parallel Multipliers Based on a Class of Irreducible Pentanomials

    Article • IEEE Transactions on Very Large Scale Integration (VLSI) Systems, December 2006, Institute of Electrical & Electronics Engineers (IEEE)

    PhD José L Imaña

  24. Finite Fields: Applications and Implementations – Guest Editorial

    Article • Acta Applicandae Mathematicae, September 2006, Springer Science + Business Media

    PhD José L Imaña

  25. Bit-parallel finite field multipliers for irreducible trinomials

    Article • IEEE Transactions on Computers, May 2006, Institute of Electrical & Electronics Engineers (IEEE)

    PhD José L Imaña

  26. Efficient Reconfigurable Implementation of Canonical and Normal Basis Multipliers Over Galois Fields GF(2 m ) Generated by AOPs

    Article • The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology, February 2006, Springer Science + Business Media

    PhD José L Imaña

  27. Streaming potential across cation-exchange membranes in methanol–water electrolyte solutions

    Article • Journal of Colloid and Interface Science, February 2006, Elsevier

    PhD José L Imaña

  28. A New Reconfigurable-Oriented Method for Canonical Basis Multiplication over a Class of Finite Fields GF(2m)

    Article • January 2003, Springer Science + Business Media

    PhD José L Imaña

  29. Effect of an AC perturbation on a desalination electrodialysis process

    Article • Desalination, March 2002, Elsevier

    PhD José L Imaña

  30. Article • Acta Applicandae Mathematicae, January 2002, Springer Science + Business Media

    PhD José L Imaña

  31. Formulation for the computation of Boolean operations

    Article • IEE Proceedings - Computers and Digital Techniques, November 2001, the Institution of Engineering and Technology (the IET)

    PhD José L Imaña