All Stories

  1. Design of fault-tolerant microprocessors for space applications
  2. Circuit-Level Layout-Aware Modeling of Single-Event Effects in 65-nm CMOS ICs
  3. On board electronic devices safety provided by DICE-based Muller C-elements
  4. New stage in high-energy gamma-ray studies with GAMMA-400 after Fermi-LAT
  5. Design Trade-off Between Performance and Fault-Tolerance of Space Onboard Computers
  6. High-energy gamma-ray studying with GAMMA-400 after Fermi-LAT
  7. Layout-aware Soft Error Rate Estimation Technique for Integrated Circuits under the Environment with Energetic Charged Particles
  8. Modifications of a method for low energy gamma-ray incident angle reconstruction in the GAMMA-400 gamma-ray telescope
  9. Status of the scientific data acquisition system for the GAMMA-400 space telescope mission
  10. Layout-aware simulation of soft errors in sub-100 nm integrated circuits
  11. Total ionizing dose effects modeling in common-gate tri-gate FinFETs using Verilog-A
  12. Semi-Empirical Method for Estimation of Single-Event Upset Cross Section for SRAM DICE Cells
  13. The structure of control and data transfer management system for the GAMMA-400 scientific complex
  14. The scientific data acquisition system of the GAMMA-400 space project
  15. The GAMMA-400 gamma-ray telescope for precision gamma-ray emission investigations
  16. Perspectives of the GAMMA-400 space observatory for high-energy gamma rays and cosmic rays measurements
  17. Temperature Dependence of MCU Sensitivity in 65 nm CMOS SRAM
  18. Separation of electrons and protons in the GAMMA-400 gamma-ray telescope
  19. Semi-Empirical Method for Estimation of Single-Event Upset Cross-Section for SRAM DICE Cells
  20. Multiple Cell Upset Cross-Section Uncertainty in Nanoscale Memories: Microdosimetric Approach
  21. The GAMMA-400 experiment: Status and prospects
  22. Statistics and methodology of multiple cell upset characterization under heavy ion irradiation
  23. Space γ-observatory GAMMA-400 Current Status and Perspectives
  24. Estimation technique for SET-tolerance of combinational ICs
  25. Radiation-induced mismatch enhancement in 65nm CMOS SRAM for space applications
  26. SET Tolerance of 65 nm CMOS Majority Voters: A Comparative Study
  27. Microdose Induced Drain Leakage Effects in Power Trench MOSFETs: Experiment and Modeling
  28. Design of 65 nm CMOS SRAM for Space Applications: A Comparative Study
  29. SET tolerance of 65 nm CMOS majority voters: A comparative study
  30. Microdose induced drain leakage effects in power trench MOSFETs: Experiment and modeling
  31. Design of 65 nm CMOS SRAM for space applications: A comparative study
  32. Fault-Tolerant SOI Microprocessor for Space Applications
  33. Analysis of SOI CMOS Microprocessor's SEE Sensitivity: Correlation of the Results Obtained by Different Test Methods
  34. Analysis of SOI CMOS microprocessor's SEE sensitivity: Correlation of the results obtained by different test methods
  35. Verilog-A Modeling of Radiation-Induced Mismatch Enhancement
  36. Radiation-hardening-by-design with circuit-level modeling of total ionizing dose effects in modern CMOS technologies
  37. Modeling of Radiation-Induced Leakage and Low Dose-Rate Effects in Thick Edge Isolation of Modern MOSFETs
  38. Multi-scale modeling of low dose-rate total dose effects in advanced microelectronics
  39. Radiation induced leakage due to stochastic charge trapping in isolation layers of nanoscale MOSFETs
  40. Parasitic bipolar effect in modern SOI CMOS technologies
  41. Compact physical modeling of fully depleted SOI MOSFET
  42. Diffusion-Drift Model of Fully Depleted SOI MOSFET