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  1. Finite state machine-based fault tolerance technique with enhanced area and power of synthesised sequential circuits

    Article • IET Computers & Digital Techniques, July 2017, the Institution of Engineering and Technology (the IET)

    Dr Aiman Helmi El-Maleh

  2. Majority-based evolution state assignment algorithm for area and power optimisation of sequential circuits

    Article • IET Computers & Digital Techniques, January 2016, the Institution of Engineering and Technology (the IET)

    Dr Aiman Helmi El-Maleh