All Stories

  1. An Electrostatic Discharge Protection Circuit Technique for the Mitigation of Single-Event Transients in SiGe BiCMOS Technology
  2. Modeling Single-Event Transient Propagation in a SiGe BiCMOS Direct-Conversion Receiver
  3. A SiGe-BiCMOS Wideband (2–22 GHz) Active Power Divider/Combiner Circuit Supporting Bidirectional Operation
  4. A Compact, Active SiGe Power Divider With Multi-Octave Bandwidth
  5. This paper describe the design of a high-efficiency high-output-power power amplifier.
  6. Wideband active bi-directional SiGe digital step attenuator using an active DPDT switch
  7. Modeling single-event transient propagation in a SiGe BiCMOS direct-conversion receiver
  8. A Compact, Wideband Lumped-Element Wilkinson Power Divider/Combiner Using Symmetric Inductors with Embedded Capacitors
  9. A 2–22 GHz wideband active bi-directional power divider/combiner in 130 nm SiGe BiCMOS technology
  10. An Active Bi-Directional SiGe DPDT Switch With Multi-Octave Bandwidth
  11. Optimization of SiGe HBT RF Switches for Single-Event Transient Mitigation
  12. SiGe HBT LNA with TSV
  13. Impact of Total Ionizing Dose on a 4th Generation, 90 nm SiGe HBT Gaussian Pulse Generator
  14. Evaluation of Enhanced Low Dose Rate Sensitivity in Fourth-Generation SiGe HBTs
  15. Design of Radiation-Hardened RF Low-Noise Amplifiers Using Inverse-Mode SiGe HBTs
  16. An Investigation of Single-Event Transients in C-SiGe HBT on SOI Current Mirror Circuits
  17. A 34–110 GHz wideband, asymmetric, broadside-coupled Marchand balun in 180 nm SiGe BiCMOS technology
  18. Systematic methodology for applying Mason's signal flow graph to analysis of feedback circuits
  19. A complementary SiGe HBT on SOI low dropout voltage regulator utilizing a nulling resistor
  20. An investigation of the temperature dependent linearity of weakly-saturated, electrically-matched SiGe NPN and PNP HBTs
  21. A 20nm 1.8V 8Gb PRAM with 40MB/s program bandwidth
  22. A 58nm 1.8V 1Gb PRAM with 6.4MB/s program BW
  23. $f_{\max}$ Improvement by Controlling Extrinsic Parasitics in Circuit-Level MOS Transistor
  24. 0.7 V supply highly linear subthreshold low-noise amplifier design for 2.4 GHz wireless sensor network applications
  25. Application of the Compact Channel Thermal Noise Model of Short Channel MOSFETs to CMOS RFIC Design
  26. Low power size-efficient CMOS UWB low-noise amplifier design
  27. A Simple Figure of Merit of RF MOSFET for Low-Noise Amplifier Design
  28. A low power low noise amplifier with subthreshold operation in 130 nm CMOS technology
  29. Accurate Extraction of Effective Channel Length and Source/Drain Series Resistance in Ultrashort-Channel MOSFETs by Iteration Method
  30. A 2.4 GHz CMOS ultra low power low noise amplifier design with 65 nm CMOS technology
  31. Design optimization of a 10 GHz low noise amplifier with gate drain capacitance consideration in 65 nm CMOS technology
  32. Small size low noise amplifier with suppressed noise from gate resistance
  33. Characterization of Sensitivity and Resolution of Silicon Resistive Probe
  34. Optimization of cascode configuration in CMOS low-noise amplifier
  35. Suppression of Digital Noise Coupling on LNA in 0.13-μm RFCMOS Technology by Global Guard Rings
  36. Suppression of Digital Noise Coupling on LNA in 0.13-μm RFCMOS Technology by Global Guard Rings
  37. 2.4 GHz ISM-Band Receiver Design in a 0.18 $\mu{\hbox{m}}$ Mixed Signal CMOS Process
  38. Analytic approach to power-constrained CMOS low-noise amplifier design with figure of merit consideration
  39. A New Noise Parameter Model of Short-Channel MOSFETs