All Stories

  1. VLSI realisation of neural velocity integrator and central pattern generator

    Article • Electronics Letters, September 2015, the Institution of Engineering and Technology (the IET)

    Dr Anu Aggarwal

  2. Neuromorphic VLSI second-order synapse

    Article • Electronics Letters, February 2015, the Institution of Engineering and Technology (the IET)

    Dr Anu Aggarwal

  3. Neuromorphic VLSI Bayesian integration synapse

    Article • Electronics Letters, February 2015, the Institution of Engineering and Technology (the IET)

    Dr Anu Aggarwal

  4. Training artificial neural networks with memristive synapses: HSPICE-matlab co-simulation

    Article • September 2012, Institute of Electrical & Electronics Engineers (IEEE)

    Dr Anu Aggarwal