All Stories

  1. Process variation challenges and resolution in the negative-tone develop double patterning for 20nm and below technology node

    Article • March 2015, SPIE

    Mr. Sohan S Mehta

  2. Investigating deprotection-induced shrinkage and retro-grade sidewalls in NTD resists

    Article • March 2015, SPIE

    Mr. Sohan S Mehta

  3. Integration of an EUV metal layer: a 20/14nm demo

    Article • April 2014, SPIE

    Mr. Sohan S Mehta

  4. Evaluation of lens heating effect in high transmission NTD processes at the 20nm technology node

    Article • April 2014, SPIE

    Mr. Sohan S Mehta

  5. High order wafer alignment for 20nm node logic process

    Article • April 2013, SPIE

    Mr. Sohan S Mehta

  6. 20nm VIA BEOL patterning challenges

    Article • March 2013, SPIE

    Mr. Sohan S Mehta

  7. Investigation of trench and contact hole shrink mechanism in the negative tone develop process

    Article • March 2013, SPIE

    Mr. Sohan S Mehta

  8. C-quad polarized illumination for back end thin wire: moving beyond annular illumination regime

    Article • March 2009, SPIE

    Mr. Sohan S Mehta

  9. Reflectivity-induced variation in implant layer lithography

    Article • March 2008, SPIE

    Mr. Sohan S Mehta

  10. Alternating phase shifted scattering bars for low k[sub 1] trench pattering

    Article • January 2006, American Vacuum Society

    Mr. Sohan S Mehta

  11. Process method to suppress the effect of phase errors in alternating phase shift masks

    Article • Journal of Vacuum Science & Technology B Microelectronics Processing and Phenomena, January 2005, American Vacuum Society

    Mr. Sohan S Mehta

  12. A FinFET and Tri-gate MOSFET's channel structure patterning and its influence on the device performance

    Article • Thin Solid Films, September 2004, Elsevier

    Mr. Sohan S Mehta

  13. Placement of scattering bars in binary and attenuated phase shift mask for damascene trench patterning

    Article • Microelectronics Journal, July 2004, Elsevier

    Mr. Sohan S Mehta

  14. Key challenges in across-pitch 0.33-k 1 trench patterning using hybrid mask

    Article • May 2004, SPIE

    Mr. Sohan S Mehta

  15. Alignment in chromeless masks

    Article • May 2004, SPIE

    Mr. Sohan S Mehta

  16. Patterning sub-50-nm Fin-FET using KrF lithography tool

    Article • May 2004, SPIE

    Mr. Sohan S Mehta

  17. Resist pattern peeling assessment in DUV chemically amplified resist

    Article • Microelectronics Journal, May 2004, Elsevier

    Mr. Sohan S Mehta

  18. Impact of scattering bars in damascene trench patterning

    Article • June 2003, SPIE

    Mr. Sohan S Mehta

  19. Evaluation of alignment target designs for Cu and low-K dual damascene processes

    Article • May 2003, SPIE

    Mr. Sohan S Mehta

  20. Defocusing image to pattern contact holes using attenuated phase shift masks

    Article • Microelectronics Journal, April 2003, Elsevier

    Mr. Sohan S Mehta